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Side by Side Diff: src/trusted/validator_arm/gen/arm32_decode.h

Issue 11194045: Change BKPT and UDF encodings on ARM. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client
Patch Set: Update copyright. Created 8 years, 2 months ago
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1 /* 1 /*
2 * Copyright 2012 The Native Client Authors. All rights reserved. 2 * Copyright 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can 3 * Use of this source code is governed by a BSD-style license that can
4 * be found in the LICENSE file. 4 * be found in the LICENSE file.
5 */ 5 */
6 6
7 // DO NOT EDIT: GENERATED CODE 7 // DO NOT EDIT: GENERATED CODE
8 8
9 9
10 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ 10 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_
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179 const LoadBasedOffsetMemory LoadBasedOffsetMemory_instance_; 179 const LoadBasedOffsetMemory LoadBasedOffsetMemory_instance_;
180 const LoadBasedOffsetMemoryDouble LoadBasedOffsetMemoryDouble_instance_; 180 const LoadBasedOffsetMemoryDouble LoadBasedOffsetMemoryDouble_instance_;
181 const LoadMultiple LoadMultiple_instance_; 181 const LoadMultiple LoadMultiple_instance_;
182 const LoadVectorRegister LoadVectorRegister_instance_; 182 const LoadVectorRegister LoadVectorRegister_instance_;
183 const LoadVectorRegisterList LoadVectorRegisterList_instance_; 183 const LoadVectorRegisterList LoadVectorRegisterList_instance_;
184 const MaskAddress MaskAddress_instance_; 184 const MaskAddress MaskAddress_instance_;
185 const MoveDoubleVfpRegisterOp MoveDoubleVfpRegisterOp_instance_; 185 const MoveDoubleVfpRegisterOp MoveDoubleVfpRegisterOp_instance_;
186 const MoveVfpRegisterOp MoveVfpRegisterOp_instance_; 186 const MoveVfpRegisterOp MoveVfpRegisterOp_instance_;
187 const MoveVfpRegisterOpWithTypeSel MoveVfpRegisterOpWithTypeSel_instance_; 187 const MoveVfpRegisterOpWithTypeSel MoveVfpRegisterOpWithTypeSel_instance_;
188 const NotImplemented NotImplemented_instance_; 188 const NotImplemented NotImplemented_instance_;
189 const PermanentlyUndefined PermanentlyUndefined_instance_;
189 const PreloadRegisterPairOp PreloadRegisterPairOp_instance_; 190 const PreloadRegisterPairOp PreloadRegisterPairOp_instance_;
190 const PreloadRegisterPairOpWAndRnNotPc PreloadRegisterPairOpWAndRnNotPc_instan ce_; 191 const PreloadRegisterPairOpWAndRnNotPc PreloadRegisterPairOpWAndRnNotPc_instan ce_;
191 const Roadblock Roadblock_instance_;
192 const Store2RegisterImm12OpRnNotRtOnWriteback Store2RegisterImm12OpRnNotRtOnWr iteback_instance_; 192 const Store2RegisterImm12OpRnNotRtOnWriteback Store2RegisterImm12OpRnNotRtOnWr iteback_instance_;
193 const StoreBasedImmedMemory StoreBasedImmedMemory_instance_; 193 const StoreBasedImmedMemory StoreBasedImmedMemory_instance_;
194 const StoreBasedImmedMemoryDouble StoreBasedImmedMemoryDouble_instance_; 194 const StoreBasedImmedMemoryDouble StoreBasedImmedMemoryDouble_instance_;
195 const StoreBasedMemoryDoubleRtBits0To3 StoreBasedMemoryDoubleRtBits0To3_instan ce_; 195 const StoreBasedMemoryDoubleRtBits0To3 StoreBasedMemoryDoubleRtBits0To3_instan ce_;
196 const StoreBasedMemoryRtBits0To3 StoreBasedMemoryRtBits0To3_instance_; 196 const StoreBasedMemoryRtBits0To3 StoreBasedMemoryRtBits0To3_instance_;
197 const StoreBasedOffsetMemory StoreBasedOffsetMemory_instance_; 197 const StoreBasedOffsetMemory StoreBasedOffsetMemory_instance_;
198 const StoreBasedOffsetMemoryDouble StoreBasedOffsetMemoryDouble_instance_; 198 const StoreBasedOffsetMemoryDouble StoreBasedOffsetMemoryDouble_instance_;
199 const StoreRegisterList StoreRegisterList_instance_; 199 const StoreRegisterList StoreRegisterList_instance_;
200 const StoreVectorRegister StoreVectorRegister_instance_; 200 const StoreVectorRegister StoreVectorRegister_instance_;
201 const StoreVectorRegisterList StoreVectorRegisterList_instance_; 201 const StoreVectorRegisterList StoreVectorRegisterList_instance_;
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245 const VectorBinary3RegisterSameLengthDQI8P VectorBinary3RegisterSameLengthDQI8 P_instance_; 245 const VectorBinary3RegisterSameLengthDQI8P VectorBinary3RegisterSameLengthDQI8 P_instance_;
246 const VectorBinary3RegisterSameLengthDQI8_16_32 VectorBinary3RegisterSameLengt hDQI8_16_32_instance_; 246 const VectorBinary3RegisterSameLengthDQI8_16_32 VectorBinary3RegisterSameLengt hDQI8_16_32_instance_;
247 const VectorUnary2RegisterDup VectorUnary2RegisterDup_instance_; 247 const VectorUnary2RegisterDup VectorUnary2RegisterDup_instance_;
248 const VfpMrsOp VfpMrsOp_instance_; 248 const VfpMrsOp VfpMrsOp_instance_;
249 const VfpOp VfpOp_instance_; 249 const VfpOp VfpOp_instance_;
250 const NotImplemented not_implemented_; 250 const NotImplemented not_implemented_;
251 }; 251 };
252 252
253 } // namespace nacl_arm_dec 253 } // namespace nacl_arm_dec
254 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_ 254 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_GEN_ARM32_DECODE_H_
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