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Unified Diff: src/mips/stub-cache-mips.cc

Issue 111933004: MIPS: Fix popping order on ARM. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years ago
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Index: src/mips/stub-cache-mips.cc
diff --git a/src/mips/stub-cache-mips.cc b/src/mips/stub-cache-mips.cc
index 8e379f73c5c42fabbe6ccb2db59cc4bc903ad2a0..0b84e5ab1a69193e67e537e8557b879879521b03 100644
--- a/src/mips/stub-cache-mips.cc
+++ b/src/mips/stub-cache-mips.cc
@@ -1082,9 +1082,9 @@ class CallInterceptorCompiler BASE_EMBEDDED {
CompileCallLoadPropertyWithInterceptor(
masm, receiver, holder, name_, holder_obj,
IC::kLoadPropertyWithInterceptorOnly);
- __ pop(receiver);
__ pop(name_);
__ pop(holder);
+ __ pop(receiver);
}
// If interceptor returns no-result sentinel, call the constant function.
__ LoadRoot(scratch, Heap::kNoInterceptorResultSentinelRootIndex);
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