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Side by Side Diff: src/mips64/constants-mips64.h

Issue 1119203003: MIPS: Add float instructions and test coverage, part one (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 7 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_CONSTANTS_H_ 5 #ifndef V8_MIPS_CONSTANTS_H_
6 #define V8_MIPS_CONSTANTS_H_ 6 #define V8_MIPS_CONSTANTS_H_
7 7
8 // UNIMPLEMENTED_ macro for MIPS. 8 // UNIMPLEMENTED_ macro for MIPS.
9 #ifdef DEBUG 9 #ifdef DEBUG
10 #define UNIMPLEMENTED_MIPS() \ 10 #define UNIMPLEMENTED_MIPS() \
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492 MOV_D = ((0 << 3) + 6), 492 MOV_D = ((0 << 3) + 6),
493 NEG_D = ((0 << 3) + 7), 493 NEG_D = ((0 << 3) + 7),
494 ROUND_L_D = ((1 << 3) + 0), 494 ROUND_L_D = ((1 << 3) + 0),
495 TRUNC_L_D = ((1 << 3) + 1), 495 TRUNC_L_D = ((1 << 3) + 1),
496 CEIL_L_D = ((1 << 3) + 2), 496 CEIL_L_D = ((1 << 3) + 2),
497 FLOOR_L_D = ((1 << 3) + 3), 497 FLOOR_L_D = ((1 << 3) + 3),
498 ROUND_W_D = ((1 << 3) + 4), 498 ROUND_W_D = ((1 << 3) + 4),
499 TRUNC_W_D = ((1 << 3) + 5), 499 TRUNC_W_D = ((1 << 3) + 5),
500 CEIL_W_D = ((1 << 3) + 6), 500 CEIL_W_D = ((1 << 3) + 6),
501 FLOOR_W_D = ((1 << 3) + 7), 501 FLOOR_W_D = ((1 << 3) + 7),
502 RECIP = ((2 << 3) + 5),
503 RSQRT_D = ((2 << 3) + 6),
502 MIN = ((3 << 3) + 4), 504 MIN = ((3 << 3) + 4),
503 MINA = ((3 << 3) + 5), 505 MINA = ((3 << 3) + 5),
504 MAX = ((3 << 3) + 6), 506 MAX = ((3 << 3) + 6),
505 MAXA = ((3 << 3) + 7), 507 MAXA = ((3 << 3) + 7),
506 CVT_S_D = ((4 << 3) + 0), 508 CVT_S_D = ((4 << 3) + 0),
507 CVT_W_D = ((4 << 3) + 4), 509 CVT_W_D = ((4 << 3) + 4),
508 CVT_L_D = ((4 << 3) + 5), 510 CVT_L_D = ((4 << 3) + 5),
509 C_F_D = ((6 << 3) + 0), 511 C_F_D = ((6 << 3) + 0),
510 C_UN_D = ((6 << 3) + 1), 512 C_UN_D = ((6 << 3) + 1),
511 C_EQ_D = ((6 << 3) + 2), 513 C_EQ_D = ((6 << 3) + 2),
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550 CMP_SAT = ((3 << 3) + 0), // Reserved, not implemented. 552 CMP_SAT = ((3 << 3) + 0), // Reserved, not implemented.
551 CMP_SOR = ((3 << 3) + 1), 553 CMP_SOR = ((3 << 3) + 1),
552 CMP_SUNE = ((3 << 3) + 2), 554 CMP_SUNE = ((3 << 3) + 2),
553 CMP_SNE = ((3 << 3) + 3), 555 CMP_SNE = ((3 << 3) + 3),
554 CMP_SUGE = ((3 << 3) + 4), // Reserved, not implemented. 556 CMP_SUGE = ((3 << 3) + 4), // Reserved, not implemented.
555 CMP_SOGE = ((3 << 3) + 5), // Reserved, not implemented. 557 CMP_SOGE = ((3 << 3) + 5), // Reserved, not implemented.
556 CMP_SUGT = ((3 << 3) + 6), // Reserved, not implemented. 558 CMP_SUGT = ((3 << 3) + 6), // Reserved, not implemented.
557 CMP_SOGT = ((3 << 3) + 7), // Reserved, not implemented. 559 CMP_SOGT = ((3 << 3) + 7), // Reserved, not implemented.
558 560
559 SEL = ((2 << 3) + 0), 561 SEL = ((2 << 3) + 0),
562 MOVF = ((2 << 3) + 1), // Function field for MOVT.fmt and MOVF.fmt
563 MOVZ_C = ((2 << 3) + 2),
564 MOVN_C = ((2 << 3) + 3),
560 SELEQZ_C = ((2 << 3) + 4), // COP1 on FPR registers. 565 SELEQZ_C = ((2 << 3) + 4), // COP1 on FPR registers.
561 SELNEZ_C = ((2 << 3) + 7), // COP1 on FPR registers. 566 SELNEZ_C = ((2 << 3) + 7), // COP1 on FPR registers.
562 567
563 // COP1 Encoding of Function Field When rs=PS. 568 // COP1 Encoding of Function Field When rs=PS.
564 // COP1X Encoding of Function Field. 569 // COP1X Encoding of Function Field.
565 MADD_D = ((4 << 3) + 1), 570 MADD_D = ((4 << 3) + 1),
566 571
567 NULLSF = 0 572 NULLSF = 0
568 }; 573 };
569 574
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942 // TODO(plind): below should be based on kPointerSize 947 // TODO(plind): below should be based on kPointerSize
943 // TODO(plind): find all usages and remove the needless instructions for n64. 948 // TODO(plind): find all usages and remove the needless instructions for n64.
944 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; 949 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2;
945 950
946 const int kInvalidStackOffset = -1; 951 const int kInvalidStackOffset = -1;
947 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; 952 const int kBranchReturnOffset = 2 * Instruction::kInstrSize;
948 953
949 } } // namespace v8::internal 954 } } // namespace v8::internal
950 955
951 #endif // #ifndef V8_MIPS_CONSTANTS_H_ 956 #endif // #ifndef V8_MIPS_CONSTANTS_H_
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