Put more constants in movw/movt instructions

src/arm/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 801 matching lines @@
 #endif  // def DEBUG
     if (assembler != NULL && assembler->predictable_code_size()) return true;
     return Serializer::enabled();
   } else if (rmode_ == RelocInfo::NONE) {
     return false;
   }
   return true;
 }
 
 
+static bool use_movw_movt(const Operand& x, const Assembler* assembler) {
+  if (Assembler::use_immediate_constant_pool_loads(assembler)) {
+    return true;
+  }
+  if (x.must_output_reloc_info(assembler)) {
+    return false;
+  }
+  return CpuFeatures::IsSupported(ARMv7);
+}
+
+
 bool Operand::is_single_instruction(const Assembler* assembler,
                                     Instr instr) const {
   if (rm_.is_valid()) return true;
   uint32_t dummy1, dummy2;
   if (must_output_reloc_info(assembler) ||
       !fits_shifter(imm32_, &dummy1, &dummy2, &instr)) {
     // The immediate operand cannot be encoded as a shifter operand, or use of
     // constant pool is required. For a mov instruction not setting the
     // condition code additional instruction conventions can be used.
     if ((instr & ~kCondMask) == 13*B21) {  // mov, S not set
-#ifdef USE_BLX
-      // When using BLX, there are two things that must be true for the address
-      // load to be longer than a single instruction. First, immediate loads
-      // using movw/movt must be supported (and fast) on the target ARM
-      // architecture. Second, the reloc mode must be something other than NONE,
-      // since NONE is a used whenever the constant pool cannot be used for
-      // technical reasons, e.g. back-patching calls site in optimized code with
-      // a call to a lazy deopt routine.
-      return !Assembler::allow_immediate_constant_pool_loads(assembler) &&
-          rmode_ != RelocInfo::NONE;
-#else
-      // It's not possible to use immediate loads to the pc to do a call, (the
-      // pc would be inconsistent half-way through the load), so loading the
-      // destination address without USE_BLX is always a single instruction of
-      // the form ldr pc, [pc + #xxx].
-      return true;
-#endif
+      return !use_movw_movt(*this, assembler);
     } else {
       // If this is not a mov or mvn instruction there will always an additional
       // instructions - either mov or ldr. The mov might actually be two
       // instructions mov or movw followed by movt so including the actual
       // instruction two or three instructions will be generated.
       return false;
     }
   } else {
     // No use of constant pool and the immediate operand can be encoded as a
     // shifter operand.
     return true;
   }
 }
 
 
 void Assembler::move_32_bit_immediate(Condition cond,
                                       Register rd,
                                       SBit s,
                                       const Operand& x) {
   if (rd.code() != pc.code() && s == LeaveCC) {
-    // Candidate for immediate load.
-    if (x.must_output_reloc_info(this)) {
-      if (!Assembler::allow_immediate_constant_pool_loads(this)) {
-        RecordRelocInfo(x.rmode_, x.imm32_, USE_CONSTANT_POOL);
-        ldr(rd, MemOperand(pc, 0), cond);
-        return;
+    if (use_movw_movt(x, this)) {
+      if (x.must_output_reloc_info(this)) {
+        RecordRelocInfo(x.rmode_, x.imm32_, DONT_USE_CONSTANT_POOL);
+        // Make sure the movw/movt doesn't get separated.
+        BlockConstPoolFor(2);
       }
-      RecordRelocInfo(x.rmode_, x.imm32_, DONT_USE_CONSTANT_POOL);
-      // Make sure the movw/movt doesn't get separated.
-      BlockConstPoolFor(2);
+      emit(cond | 0x30*B20 | rd.code()*B12 |
+           EncodeMovwImmediate(x.imm32_ & 0xffff));
+      movt(rd, static_cast<uint32_t>(x.imm32_) >> 16, cond);
+      return;
     }
+  }
 
-    // Emit a real movw/movt pair.
-    emit(cond | 0x30*B20 | rd.code()*B12 |
-         EncodeMovwImmediate(x.imm32_ & 0xffff));
-    movt(rd, static_cast<uint32_t>(x.imm32_) >> 16, cond);
-  } else {
-    RecordRelocInfo(x.rmode_, x.imm32_, USE_CONSTANT_POOL);
-    ldr(rd, MemOperand(pc, 0), cond);
-  }
+  RecordRelocInfo(x.rmode_, x.imm32_, USE_CONSTANT_POOL);
+  ldr(rd, MemOperand(pc, 0), cond);
 }
 
 
 void Assembler::addrmod1(Instr instr,
                          Register rn,
                          Register rd,
                          const Operand& x) {
   CheckBuffer();
   ASSERT((instr & ~(kCondMask | kOpCodeMask | S)) == 0);
   if (!x.rm_.is_valid()) {
@@ skipping 10 matching lines @@
       Condition cond = Instruction::ConditionField(instr);
       if ((instr & ~kCondMask) == 13*B21) {  // mov, S not set
         move_32_bit_immediate(cond, rd, LeaveCC, x);
       } else {
         // If this is not a mov or mvn instruction we may still be able to avoid
         // a constant pool entry by using mvn or movw.
         if (!x.must_output_reloc_info(this) &&
             (instr & kMovMvnMask) != kMovMvnPattern) {
           mov(ip, x, LeaveCC, cond);
         } else {
-          move_32_bit_immediate(cond, ip,
-                                static_cast<SBit>(instr & (1 << 20)), x);
+          move_32_bit_immediate(cond, ip, LeaveCC, x);
         }
         addrmod1(instr, rn, rd, Operand(ip));
       }
       return;
     }
     instr |= I | rotate_imm*B8 | immed_8;
   } else if (!x.rs_.is_valid()) {
     // Immediate shift.
     instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
   } else {
@@ skipping 1848 matching lines @@
 
   // Since a constant pool was just emitted, move the check offset forward by
   // the standard interval.
   next_buffer_check_ = pc_offset() + kCheckPoolInterval;
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM