Subzero: Use a setcc sequence for better icmp lowering.

tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll

 ; This tests the optimization of atomic cmpxchg w/ following cmp + branches.
 
 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
 ; RUN:   | FileCheck --check-prefix=O2 %s
 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
 ; RUN:   | FileCheck --check-prefix=OM1 %s
 
 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
 
 
@@ skipping 23 matching lines @@
 ; O2-LABEL: test_atomic_cmpxchg_loop
 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
 ; O2-NEXT: j{{e|ne}}
 ; Make sure the call isn't accidentally deleted.
 ; O2: call
 ;
 ; Check that the unopt version does have a cmp
 ; OM1-LABEL: test_atomic_cmpxchg_loop
 ; OM1: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
 ; OM1: cmp
-; OM1: je
+; OM1: sete
 ; OM1: call
 
 ; Still works if the compare operands are flipped.
 define i32 @test_atomic_cmpxchg_loop2(i32 %iptr, i32 %expected, i32 %desired) {
 entry:
   br label %loop
 
 loop:
   %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ]
   %ptr = inttoptr i32 %iptr to i32*
@@ skipping 68 matching lines @@
   br i1 %success, label %done, label %loop
 
 done:
   %r = zext i1 %success to i32
   ret i32 %r
 }
 ; O2-LABEL: test_atomic_cmpxchg_no_opt2
 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
 ; O2: mov {{.*}}
 ; O2: cmp
-; O2: je
+; O2: sete