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Issue 1118353005: Subzero: Use a setcc sequence for better icmp lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Cleanup Created 5 years, 7 months ago
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1 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===// 1 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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485 485
486 void pushl(GPRRegister reg); 486 void pushl(GPRRegister reg);
487 487
488 void popl(GPRRegister reg); 488 void popl(GPRRegister reg);
489 void popl(const Address &address); 489 void popl(const Address &address);
490 490
491 void pushal(); 491 void pushal();
492 void popal(); 492 void popal();
493 493
494 void setcc(CondX86::BrCond condition, ByteRegister dst); 494 void setcc(CondX86::BrCond condition, ByteRegister dst);
495 void setcc(CondX86::BrCond condition, const Address &address);
495 496
496 void mov(Type Ty, GPRRegister dst, const Immediate &src); 497 void mov(Type Ty, GPRRegister dst, const Immediate &src);
497 void mov(Type Ty, GPRRegister dst, GPRRegister src); 498 void mov(Type Ty, GPRRegister dst, GPRRegister src);
498 499
499 void mov(Type Ty, GPRRegister dst, const Address &src); 500 void mov(Type Ty, GPRRegister dst, const Address &src);
500 void mov(Type Ty, const Address &dst, GPRRegister src); 501 void mov(Type Ty, const Address &dst, GPRRegister src);
501 void mov(Type Ty, const Address &dst, const Immediate &imm); 502 void mov(Type Ty, const Address &dst, const Immediate &imm);
502 503
503 void movzx(Type Ty, GPRRegister dst, GPRRegister src); 504 void movzx(Type Ty, GPRRegister dst, GPRRegister src);
504 void movzx(Type Ty, GPRRegister dst, const Address &src); 505 void movzx(Type Ty, GPRRegister dst, const Address &src);
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880 inline void AssemblerX8632::EmitFixup(AssemblerFixup *fixup) { 881 inline void AssemblerX8632::EmitFixup(AssemblerFixup *fixup) {
881 buffer_.EmitFixup(fixup); 882 buffer_.EmitFixup(fixup);
882 } 883 }
883 884
884 inline void AssemblerX8632::EmitOperandSizeOverride() { EmitUint8(0x66); } 885 inline void AssemblerX8632::EmitOperandSizeOverride() { EmitUint8(0x66); }
885 886
886 } // end of namespace X8632 887 } // end of namespace X8632
887 } // end of namespace Ice 888 } // end of namespace Ice
888 889
889 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H 890 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H
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