| Index: source/libvpx/vp9/common/mips/dspr2/vp9_itrans32_dspr2.c
 | 
| ===================================================================
 | 
| --- source/libvpx/vp9/common/mips/dspr2/vp9_itrans32_dspr2.c	(revision 240950)
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| +++ source/libvpx/vp9/common/mips/dspr2/vp9_itrans32_dspr2.c	(working copy)
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| @@ -19,7 +19,8 @@
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|  #include "vp9/common/mips/dspr2/vp9_common_dspr2.h"
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|  
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|  #if HAVE_DSPR2
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| -static void idct32_1d_rows_dspr2(const int16_t *input, int16_t *output) {
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| +static void idct32_1d_rows_dspr2(const int16_t *input, int16_t *output,
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| +                                 uint32_t no_rows) {
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|    int16_t step1_0, step1_1, step1_2, step1_3, step1_4, step1_5, step1_6;
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|    int16_t step1_7, step1_8, step1_9, step1_10, step1_11, step1_12, step1_13;
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|    int16_t step1_14, step1_15, step1_16, step1_17, step1_18, step1_19, step1_20;
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| @@ -42,7 +43,7 @@
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|    const int const_2_power_13 = 8192;
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|    const int32_t *input_int;
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|  
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| -  for (i = 32; i--; ) {
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| +  for (i = no_rows; i--; ) {
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|      input_int = (const int32_t *)input;
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|  
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|      if (!(input_int[0]  | input_int[1]  | input_int[2]  | input_int[3]  |
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| @@ -881,12 +882,74 @@
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|    );
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|  
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|    // Rows
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| -  idct32_1d_rows_dspr2(input, outptr);
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| +  idct32_1d_rows_dspr2(input, outptr, 32);
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|  
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|    // Columns
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|    vp9_idct32_1d_cols_add_blk_dspr2(out, dest, dest_stride);
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|  }
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|  
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| +void vp9_idct32x32_34_add_dspr2(const int16_t *input, uint8_t *dest,
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| +                                int stride) {
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| +  DECLARE_ALIGNED(32, int16_t,  out[32 * 32]);
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| +  int16_t *outptr = out;
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| +  uint32_t i;
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| +  uint32_t pos = 45;
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| +
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| +  /* bit positon for extract from acc */
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| +  __asm__ __volatile__ (
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| +    "wrdsp      %[pos],     1           \n\t"
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| +    :
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| +    : [pos] "r" (pos)
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| +  );
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| +
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| +  // Rows
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| +  idct32_1d_rows_dspr2(input, outptr, 8);
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| +
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| +  outptr += 8;
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| +  __asm__ __volatile__ (
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| +      "sw     $zero,      0(%[outptr])     \n\t"
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| +      "sw     $zero,      4(%[outptr])     \n\t"
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| +      "sw     $zero,      8(%[outptr])     \n\t"
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| +      "sw     $zero,     12(%[outptr])     \n\t"
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| +      "sw     $zero,     16(%[outptr])     \n\t"
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| +      "sw     $zero,     20(%[outptr])     \n\t"
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| +      "sw     $zero,     24(%[outptr])     \n\t"
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| +      "sw     $zero,     28(%[outptr])     \n\t"
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| +      "sw     $zero,     32(%[outptr])     \n\t"
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| +      "sw     $zero,     36(%[outptr])     \n\t"
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| +      "sw     $zero,     40(%[outptr])     \n\t"
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| +      "sw     $zero,     44(%[outptr])     \n\t"
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| +
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| +      :
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| +      : [outptr] "r" (outptr)
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| +  );
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| +
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| +  for (i = 0; i < 31; ++i) {
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| +    outptr += 32;
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| +
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| +    __asm__ __volatile__ (
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| +        "sw     $zero,      0(%[outptr])     \n\t"
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| +        "sw     $zero,      4(%[outptr])     \n\t"
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| +        "sw     $zero,      8(%[outptr])     \n\t"
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| +        "sw     $zero,     12(%[outptr])     \n\t"
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| +        "sw     $zero,     16(%[outptr])     \n\t"
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| +        "sw     $zero,     20(%[outptr])     \n\t"
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| +        "sw     $zero,     24(%[outptr])     \n\t"
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| +        "sw     $zero,     28(%[outptr])     \n\t"
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| +        "sw     $zero,     32(%[outptr])     \n\t"
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| +        "sw     $zero,     36(%[outptr])     \n\t"
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| +        "sw     $zero,     40(%[outptr])     \n\t"
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| +        "sw     $zero,     44(%[outptr])     \n\t"
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| +
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| +        :
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| +        : [outptr] "r" (outptr)
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| +    );
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| +  }
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| +
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| +  // Columns
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| +  vp9_idct32_1d_cols_add_blk_dspr2(out, dest, stride);
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| +}
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| +
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|  void vp9_idct32x32_1_add_dspr2(const int16_t *input, uint8_t *dest,
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|                                 int stride) {
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|    int       r, out;
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| 
 |