| Index: src/assembler_ia32.cpp
|
| diff --git a/src/assembler_ia32.cpp b/src/assembler_ia32.cpp
|
| index f18714edfe7a3de8f6dfa3ec5f02c530b57bebeb..b49f63a1ba9410c81d45e5f397dea41e70761f89 100644
|
| --- a/src/assembler_ia32.cpp
|
| +++ b/src/assembler_ia32.cpp
|
| @@ -23,15 +23,15 @@
|
| #include "IceOperand.h"
|
|
|
| namespace Ice {
|
| -namespace x86 {
|
| +namespace X8632 {
|
|
|
| Address Address::ofConstPool(Assembler *Asm, const Constant *Imm) {
|
| AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Imm);
|
| const RelocOffsetT Offset = 0;
|
| - return x86::Address::Absolute(Offset, Fixup);
|
| + return Address::Absolute(Offset, Fixup);
|
| }
|
|
|
| -AssemblerX86::~AssemblerX86() {
|
| +AssemblerX8632::~AssemblerX8632() {
|
| #ifndef NDEBUG
|
| for (const Label *Label : CfgNodeLabels) {
|
| Label->FinalCheck();
|
| @@ -42,7 +42,7 @@ AssemblerX86::~AssemblerX86() {
|
| #endif
|
| }
|
|
|
| -void AssemblerX86::alignFunction() {
|
| +void AssemblerX8632::alignFunction() {
|
| SizeT Align = 1 << getBundleAlignLog2Bytes();
|
| SizeT BytesNeeded = Utils::OffsetToAlignment(buffer_.GetPosition(), Align);
|
| const SizeT HltSize = 1;
|
| @@ -52,7 +52,7 @@ void AssemblerX86::alignFunction() {
|
| }
|
| }
|
|
|
| -Label *AssemblerX86::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
|
| +Label *AssemblerX8632::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
|
| Label *L = nullptr;
|
| if (Number == Labels.size()) {
|
| L = new (this->Allocate<Label>()) Label();
|
| @@ -70,39 +70,39 @@ Label *AssemblerX86::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
|
| return L;
|
| }
|
|
|
| -Label *AssemblerX86::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
|
| +Label *AssemblerX8632::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
|
| return GetOrCreateLabel(NodeNumber, CfgNodeLabels);
|
| }
|
|
|
| -Label *AssemblerX86::GetOrCreateLocalLabel(SizeT Number) {
|
| +Label *AssemblerX8632::GetOrCreateLocalLabel(SizeT Number) {
|
| return GetOrCreateLabel(Number, LocalLabels);
|
| }
|
|
|
| -void AssemblerX86::BindCfgNodeLabel(SizeT NodeNumber) {
|
| +void AssemblerX8632::BindCfgNodeLabel(SizeT NodeNumber) {
|
| assert(!getPreliminary());
|
| Label *L = GetOrCreateCfgNodeLabel(NodeNumber);
|
| this->Bind(L);
|
| }
|
|
|
| -void AssemblerX86::BindLocalLabel(SizeT Number) {
|
| +void AssemblerX8632::BindLocalLabel(SizeT Number) {
|
| Label *L = GetOrCreateLocalLabel(Number);
|
| if (!getPreliminary())
|
| this->Bind(L);
|
| }
|
|
|
| -void AssemblerX86::call(GPRRegister reg) {
|
| +void AssemblerX8632::call(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitRegisterOperand(2, reg);
|
| }
|
|
|
| -void AssemblerX86::call(const Address &address) {
|
| +void AssemblerX8632::call(const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(2, address);
|
| }
|
|
|
| -void AssemblerX86::call(const ConstantRelocatable *label) {
|
| +void AssemblerX8632::call(const ConstantRelocatable *label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| intptr_t call_start = buffer_.GetPosition();
|
| EmitUint8(0xE8);
|
| @@ -112,7 +112,7 @@ void AssemblerX86::call(const ConstantRelocatable *label) {
|
| (void)call_start;
|
| }
|
|
|
| -void AssemblerX86::call(const Immediate &abs_address) {
|
| +void AssemblerX8632::call(const Immediate &abs_address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| intptr_t call_start = buffer_.GetPosition();
|
| EmitUint8(0xE8);
|
| @@ -123,40 +123,40 @@ void AssemblerX86::call(const Immediate &abs_address) {
|
| (void)call_start;
|
| }
|
|
|
| -void AssemblerX86::pushl(GPRRegister reg) {
|
| +void AssemblerX8632::pushl(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x50 + reg);
|
| }
|
|
|
| -void AssemblerX86::popl(GPRRegister reg) {
|
| +void AssemblerX8632::popl(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x58 + reg);
|
| }
|
|
|
| -void AssemblerX86::popl(const Address &address) {
|
| +void AssemblerX8632::popl(const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x8F);
|
| EmitOperand(0, address);
|
| }
|
|
|
| -void AssemblerX86::pushal() {
|
| +void AssemblerX8632::pushal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x60);
|
| }
|
|
|
| -void AssemblerX86::popal() {
|
| +void AssemblerX8632::popal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x61);
|
| }
|
|
|
| -void AssemblerX86::setcc(CondX86::BrCond condition, ByteRegister dst) {
|
| +void AssemblerX8632::setcc(CondX86::BrCond condition, ByteRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x90 + condition);
|
| EmitUint8(0xC0 + dst);
|
| }
|
|
|
| -void AssemblerX86::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitUint8(0xB0 + dst);
|
| @@ -169,7 +169,7 @@ void AssemblerX86::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| EmitImmediate(Ty, imm);
|
| }
|
|
|
| -void AssemblerX86::mov(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::mov(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -181,7 +181,7 @@ void AssemblerX86::mov(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::mov(Type Ty, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -193,7 +193,7 @@ void AssemblerX86::mov(Type Ty, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::mov(Type Ty, const Address &dst, GPRRegister src) {
|
| +void AssemblerX8632::mov(Type Ty, const Address &dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -205,7 +205,7 @@ void AssemblerX86::mov(Type Ty, const Address &dst, GPRRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::mov(Type Ty, const Address &dst, const Immediate &imm) {
|
| +void AssemblerX8632::mov(Type Ty, const Address &dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -220,7 +220,7 @@ void AssemblerX86::mov(Type Ty, const Address &dst, const Immediate &imm) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| bool ByteSized = isByteSizedType(SrcTy);
|
| assert(ByteSized || SrcTy == IceType_i16);
|
| @@ -229,7 +229,7 @@ void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| bool ByteSized = isByteSizedType(SrcTy);
|
| assert(ByteSized || SrcTy == IceType_i16);
|
| @@ -238,7 +238,7 @@ void AssemblerX86::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| bool ByteSized = isByteSizedType(SrcTy);
|
| assert(ByteSized || SrcTy == IceType_i16);
|
| @@ -247,7 +247,7 @@ void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| bool ByteSized = isByteSizedType(SrcTy);
|
| assert(ByteSized || SrcTy == IceType_i16);
|
| @@ -256,7 +256,7 @@ void AssemblerX86::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::lea(Type Ty, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::lea(Type Ty, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -265,21 +265,21 @@ void AssemblerX86::lea(Type Ty, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cmov(CondX86::BrCond cond, GPRRegister dst,
|
| - GPRRegister src) {
|
| +void AssemblerX8632::cmov(CondX86::BrCond cond, GPRRegister dst,
|
| + GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x40 + cond);
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::rep_movsb() {
|
| +void AssemblerX8632::rep_movsb() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0xA4);
|
| }
|
|
|
| -void AssemblerX86::movss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::movss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -287,7 +287,7 @@ void AssemblerX86::movss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movss(Type Ty, const Address &dst, XmmRegister src) {
|
| +void AssemblerX8632::movss(Type Ty, const Address &dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -295,7 +295,7 @@ void AssemblerX86::movss(Type Ty, const Address &dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::movss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -303,7 +303,7 @@ void AssemblerX86::movss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::movd(XmmRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::movd(XmmRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -311,7 +311,7 @@ void AssemblerX86::movd(XmmRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movd(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::movd(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -319,7 +319,7 @@ void AssemblerX86::movd(XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movd(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movd(GPRRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -327,7 +327,7 @@ void AssemblerX86::movd(GPRRegister dst, XmmRegister src) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::movd(const Address &dst, XmmRegister src) {
|
| +void AssemblerX8632::movd(const Address &dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -335,7 +335,7 @@ void AssemblerX86::movd(const Address &dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::movq(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movq(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0x0F);
|
| @@ -343,7 +343,7 @@ void AssemblerX86::movq(XmmRegister dst, XmmRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movq(const Address &dst, XmmRegister src) {
|
| +void AssemblerX8632::movq(const Address &dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -351,7 +351,7 @@ void AssemblerX86::movq(const Address &dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::movq(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::movq(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0x0F);
|
| @@ -359,7 +359,7 @@ void AssemblerX86::movq(XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::addss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::addss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -367,7 +367,7 @@ void AssemblerX86::addss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::addss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::addss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -375,7 +375,7 @@ void AssemblerX86::addss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::subss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::subss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -383,7 +383,7 @@ void AssemblerX86::subss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::subss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::subss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -391,7 +391,7 @@ void AssemblerX86::subss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -399,7 +399,7 @@ void AssemblerX86::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::mulss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -407,7 +407,7 @@ void AssemblerX86::mulss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::divss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -415,7 +415,7 @@ void AssemblerX86::divss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::divss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::divss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -423,53 +423,53 @@ void AssemblerX86::divss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::fld(Type Ty, const Address &src) {
|
| +void AssemblerX8632::fld(Type Ty, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
|
| EmitOperand(0, src);
|
| }
|
|
|
| -void AssemblerX86::fstp(Type Ty, const Address &dst) {
|
| +void AssemblerX8632::fstp(Type Ty, const Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
|
| EmitOperand(3, dst);
|
| }
|
|
|
| -void AssemblerX86::fstp(X87STRegister st) {
|
| +void AssemblerX8632::fstp(X87STRegister st) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDD);
|
| EmitUint8(0xD8 + st);
|
| }
|
|
|
| -void AssemblerX86::movaps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movaps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x28);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movups(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movups(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x10);
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movups(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::movups(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x10);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movups(const Address &dst, XmmRegister src) {
|
| +void AssemblerX8632::movups(const Address &dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x11);
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::padd(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::padd(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -483,7 +483,7 @@ void AssemblerX86::padd(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::padd(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::padd(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -497,7 +497,7 @@ void AssemblerX86::padd(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -505,7 +505,7 @@ void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -513,7 +513,7 @@ void AssemblerX86::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -521,7 +521,7 @@ void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -529,7 +529,7 @@ void AssemblerX86::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -543,7 +543,7 @@ void AssemblerX86::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pmull(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -557,7 +557,7 @@ void AssemblerX86::pmull(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -565,7 +565,8 @@ void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -573,7 +574,7 @@ void AssemblerX86::pmuludq(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -581,7 +582,7 @@ void AssemblerX86::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::por(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -589,7 +590,7 @@ void AssemblerX86::por(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psub(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::psub(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -603,7 +604,7 @@ void AssemblerX86::psub(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psub(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::psub(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -617,7 +618,7 @@ void AssemblerX86::psub(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -625,7 +626,7 @@ void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -633,7 +634,7 @@ void AssemblerX86::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psll(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::psll(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -646,7 +647,7 @@ void AssemblerX86::psll(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psll(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -659,7 +660,7 @@ void AssemblerX86::psll(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_int8());
|
| EmitUint8(0x66);
|
| @@ -674,7 +675,7 @@ void AssemblerX86::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -void AssemblerX86::psra(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::psra(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -687,7 +688,7 @@ void AssemblerX86::psra(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psra(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -700,7 +701,7 @@ void AssemblerX86::psra(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_int8());
|
| EmitUint8(0x66);
|
| @@ -715,7 +716,7 @@ void AssemblerX86::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -void AssemblerX86::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -730,7 +731,7 @@ void AssemblerX86::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -745,7 +746,7 @@ void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_int8());
|
| EmitUint8(0x66);
|
| @@ -766,98 +767,98 @@ void AssemblerX86::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
|
| // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows
|
| // addpd, etc., we can use the Ty parameter to decide on adding
|
| // a 0x66 prefix.
|
| -void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x58);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x58);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5C);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5C);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5E);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5E);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x59);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x59);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::minps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::minps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5D);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::maxps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::maxps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5F);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::andps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::andps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x54);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::andps(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::andps(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x54);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::orps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::orps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x56);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -866,8 +867,8 @@ void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst,
|
| - const Address &src) {
|
| +void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -876,7 +877,7 @@ void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst,
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -885,8 +886,8 @@ void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst,
|
| - const Address &src) {
|
| +void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -895,8 +896,8 @@ void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst,
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cmpps(XmmRegister dst, XmmRegister src,
|
| - CondX86::CmppsCond CmpCondition) {
|
| +void AssemblerX8632::cmpps(XmmRegister dst, XmmRegister src,
|
| + CondX86::CmppsCond CmpCondition) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xC2);
|
| @@ -904,8 +905,8 @@ void AssemblerX86::cmpps(XmmRegister dst, XmmRegister src,
|
| EmitUint8(CmpCondition);
|
| }
|
|
|
| -void AssemblerX86::cmpps(XmmRegister dst, const Address &src,
|
| - CondX86::CmppsCond CmpCondition) {
|
| +void AssemblerX8632::cmpps(XmmRegister dst, const Address &src,
|
| + CondX86::CmppsCond CmpCondition) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xC2);
|
| @@ -913,56 +914,56 @@ void AssemblerX86::cmpps(XmmRegister dst, const Address &src,
|
| EmitUint8(CmpCondition);
|
| }
|
|
|
| -void AssemblerX86::sqrtps(XmmRegister dst) {
|
| +void AssemblerX8632::sqrtps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x51);
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -void AssemblerX86::rsqrtps(XmmRegister dst) {
|
| +void AssemblerX8632::rsqrtps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x52);
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -void AssemblerX86::reciprocalps(XmmRegister dst) {
|
| +void AssemblerX8632::reciprocalps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x53);
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -void AssemblerX86::movhlps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movhlps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x12);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movlhps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movlhps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x16);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::unpcklps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::unpcklps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x14);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::unpckhps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::unpckhps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x15);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::unpcklpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::unpcklpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -970,7 +971,7 @@ void AssemblerX86::unpcklpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::unpckhpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::unpckhpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -978,8 +979,8 @@ void AssemblerX86::unpckhpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::set1ps(XmmRegister dst, GPRRegister tmp1,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::set1ps(XmmRegister dst, GPRRegister tmp1,
|
| + const Immediate &imm) {
|
| // Load 32-bit immediate value into tmp1.
|
| mov(IceType_i32, tmp1, imm);
|
| // Move value from tmp1 into dst.
|
| @@ -988,8 +989,8 @@ void AssemblerX86::set1ps(XmmRegister dst, GPRRegister tmp1,
|
| shufps(dst, dst, Immediate(0x0));
|
| }
|
|
|
| -void AssemblerX86::shufps(XmmRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shufps(XmmRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xC6);
|
| @@ -998,8 +999,8 @@ void AssemblerX86::shufps(XmmRegister dst, XmmRegister src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1009,8 +1010,8 @@ void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1020,8 +1021,8 @@ void AssemblerX86::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xC6);
|
| @@ -1030,8 +1031,8 @@ void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xC6);
|
| @@ -1040,7 +1041,7 @@ void AssemblerX86::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::minpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::minpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1048,7 +1049,7 @@ void AssemblerX86::minpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::maxpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::maxpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1056,7 +1057,7 @@ void AssemblerX86::maxpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::sqrtpd(XmmRegister dst) {
|
| +void AssemblerX8632::sqrtpd(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1064,8 +1065,8 @@ void AssemblerX86::sqrtpd(XmmRegister dst) {
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shufpd(XmmRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1075,24 +1076,24 @@ void AssemblerX86::shufpd(XmmRegister dst, XmmRegister src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
|
| - XmmRegister src) {
|
| +void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
|
| + XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5B);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
|
| - const Address &src) {
|
| +void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x5B);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| - XmmRegister src) {
|
| +void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| + XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0x0F);
|
| @@ -1100,8 +1101,8 @@ void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| - const Address &src) {
|
| +void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0x0F);
|
| @@ -1109,7 +1110,7 @@ void AssemblerX86::cvttps2dq(Type /* Ignore */, XmmRegister dst,
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1117,7 +1118,8 @@ void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1125,8 +1127,8 @@ void AssemblerX86::cvtsi2ss(Type DestTy, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| - XmmRegister src) {
|
| +void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| + XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // ss2sd or sd2ss
|
| EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| @@ -1135,8 +1137,8 @@ void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| - const Address &src) {
|
| +void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1144,7 +1146,7 @@ void AssemblerX86::cvtfloat2float(Type SrcTy, XmmRegister dst,
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1152,7 +1154,8 @@ void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst,
|
| + const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1160,7 +1163,7 @@ void AssemblerX86::cvttss2si(Type SrcTy, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
|
| +void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_f64)
|
| EmitUint8(0x66);
|
| @@ -1169,7 +1172,7 @@ void AssemblerX86::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
|
| EmitXmmRegisterOperand(a, b);
|
| }
|
|
|
| -void AssemblerX86::ucomiss(Type Ty, XmmRegister a, const Address &b) {
|
| +void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const Address &b) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_f64)
|
| EmitUint8(0x66);
|
| @@ -1178,7 +1181,7 @@ void AssemblerX86::ucomiss(Type Ty, XmmRegister a, const Address &b) {
|
| EmitOperand(a, b);
|
| }
|
|
|
| -void AssemblerX86::movmskpd(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movmskpd(GPRRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1186,14 +1189,14 @@ void AssemblerX86::movmskpd(GPRRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::movmskps(GPRRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::movmskps(GPRRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x50);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1201,7 +1204,7 @@ void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
|
| EmitUint8(0x0F);
|
| @@ -1209,7 +1212,7 @@ void AssemblerX86::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::xorpd(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::xorpd(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1217,7 +1220,7 @@ void AssemblerX86::xorpd(XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::xorpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::xorpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1225,7 +1228,7 @@ void AssemblerX86::xorpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::orpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::orpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1233,21 +1236,21 @@ void AssemblerX86::orpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::xorps(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::xorps(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x57);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::xorps(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::xorps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x57);
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::andpd(XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::andpd(XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1255,7 +1258,7 @@ void AssemblerX86::andpd(XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::andpd(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::andpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1263,8 +1266,8 @@ void AssemblerX86::andpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::insertps(Type Ty, XmmRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::insertps(Type Ty, XmmRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_uint8());
|
| assert(isVectorFloatingType(Ty));
|
| @@ -1277,8 +1280,8 @@ void AssemblerX86::insertps(Type Ty, XmmRegister dst, XmmRegister src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::insertps(Type Ty, XmmRegister dst, const Address &src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const Address &src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_uint8());
|
| assert(isVectorFloatingType(Ty));
|
| @@ -1291,8 +1294,8 @@ void AssemblerX86::insertps(Type Ty, XmmRegister dst, const Address &src,
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -void AssemblerX86::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_uint8());
|
| if (Ty == IceType_i16) {
|
| @@ -1311,8 +1314,8 @@ void AssemblerX86::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
|
| }
|
| }
|
|
|
| -void AssemblerX86::pinsr(Type Ty, XmmRegister dst, const Address &src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const Address &src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_uint8());
|
| if (Ty == IceType_i16) {
|
| @@ -1331,8 +1334,8 @@ void AssemblerX86::pinsr(Type Ty, XmmRegister dst, const Address &src,
|
| }
|
| }
|
|
|
| -void AssemblerX86::pextr(Type Ty, GPRRegister dst, XmmRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::pextr(Type Ty, GPRRegister dst, XmmRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_uint8());
|
| if (Ty == IceType_i16) {
|
| @@ -1353,7 +1356,7 @@ void AssemblerX86::pextr(Type Ty, GPRRegister dst, XmmRegister src,
|
| }
|
| }
|
|
|
| -void AssemblerX86::pmovsxdq(XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pmovsxdq(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1362,7 +1365,7 @@ void AssemblerX86::pmovsxdq(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1376,7 +1379,7 @@ void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1390,7 +1393,7 @@ void AssemblerX86::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
|
| +void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1404,7 +1407,7 @@ void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
|
| +void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1418,8 +1421,8 @@ void AssemblerX86::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::roundsd(XmmRegister dst, XmmRegister src,
|
| - RoundingMode mode) {
|
| +void AssemblerX8632::roundsd(XmmRegister dst, XmmRegister src,
|
| + RoundingMode mode) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| EmitUint8(0x0F);
|
| @@ -1430,49 +1433,49 @@ void AssemblerX86::roundsd(XmmRegister dst, XmmRegister src,
|
| EmitUint8(static_cast<uint8_t>(mode) | 0x8);
|
| }
|
|
|
| -void AssemblerX86::fnstcw(const Address &dst) {
|
| +void AssemblerX8632::fnstcw(const Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(7, dst);
|
| }
|
|
|
| -void AssemblerX86::fldcw(const Address &src) {
|
| +void AssemblerX8632::fldcw(const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(5, src);
|
| }
|
|
|
| -void AssemblerX86::fistpl(const Address &dst) {
|
| +void AssemblerX8632::fistpl(const Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDF);
|
| EmitOperand(7, dst);
|
| }
|
|
|
| -void AssemblerX86::fistps(const Address &dst) {
|
| +void AssemblerX8632::fistps(const Address &dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDB);
|
| EmitOperand(3, dst);
|
| }
|
|
|
| -void AssemblerX86::fildl(const Address &src) {
|
| +void AssemblerX8632::fildl(const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDF);
|
| EmitOperand(5, src);
|
| }
|
|
|
| -void AssemblerX86::filds(const Address &src) {
|
| +void AssemblerX8632::filds(const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDB);
|
| EmitOperand(0, src);
|
| }
|
|
|
| -void AssemblerX86::fincstp() {
|
| +void AssemblerX8632::fincstp() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xF7);
|
| }
|
|
|
| -void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitComplexI8(7, Operand(reg), imm);
|
| @@ -1483,7 +1486,7 @@ void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitComplex(Ty, 7, Operand(reg), imm);
|
| }
|
|
|
| -void AssemblerX86::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
|
| +void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1494,7 +1497,7 @@ void AssemblerX86::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
|
| EmitRegisterOperand(reg0, reg1);
|
| }
|
|
|
| -void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Address &address) {
|
| +void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1505,7 +1508,7 @@ void AssemblerX86::cmp(Type Ty, GPRRegister reg, const Address &address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::cmp(Type Ty, const Address &address, GPRRegister reg) {
|
| +void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1516,7 +1519,8 @@ void AssemblerX86::cmp(Type Ty, const Address &address, GPRRegister reg) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::cmp(Type Ty, const Address &address, const Immediate &imm) {
|
| +void AssemblerX8632::cmp(Type Ty, const Address &address,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitComplexI8(7, address, imm);
|
| @@ -1527,7 +1531,7 @@ void AssemblerX86::cmp(Type Ty, const Address &address, const Immediate &imm) {
|
| EmitComplex(Ty, 7, address, imm);
|
| }
|
|
|
| -void AssemblerX86::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
|
| +void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1538,7 +1542,7 @@ void AssemblerX86::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
|
| EmitRegisterOperand(reg1, reg2);
|
| }
|
|
|
| -void AssemblerX86::test(Type Ty, const Address &addr, GPRRegister reg) {
|
| +void AssemblerX8632::test(Type Ty, const Address &addr, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1549,7 +1553,8 @@ void AssemblerX86::test(Type Ty, const Address &addr, GPRRegister reg) {
|
| EmitOperand(reg, addr);
|
| }
|
|
|
| -void AssemblerX86::test(Type Ty, GPRRegister reg, const Immediate &immediate) {
|
| +void AssemblerX8632::test(Type Ty, GPRRegister reg,
|
| + const Immediate &immediate) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
|
| // we only test the byte register to keep the encoding short.
|
| @@ -1580,8 +1585,8 @@ void AssemblerX86::test(Type Ty, GPRRegister reg, const Immediate &immediate) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::test(Type Ty, const Address &addr,
|
| - const Immediate &immediate) {
|
| +void AssemblerX8632::test(Type Ty, const Address &addr,
|
| + const Immediate &immediate) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // If the immediate is short, we only test the byte addr to keep the
|
| // encoding short.
|
| @@ -1599,7 +1604,7 @@ void AssemblerX86::test(Type Ty, const Address &addr,
|
| }
|
| }
|
|
|
| -void AssemblerX86::And(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1610,7 +1615,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::And(Type Ty, GPRRegister dst, const Address &address) {
|
| +void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1621,7 +1626,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, const Address &address) {
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -void AssemblerX86::And(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitComplexI8(4, Operand(dst), imm);
|
| @@ -1632,7 +1637,7 @@ void AssemblerX86::And(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| EmitComplex(Ty, 4, Operand(dst), imm);
|
| }
|
|
|
| -void AssemblerX86::Or(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1643,7 +1648,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::Or(Type Ty, GPRRegister dst, const Address &address) {
|
| +void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1654,7 +1659,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, const Address &address) {
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -void AssemblerX86::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitComplexI8(1, Operand(dst), imm);
|
| @@ -1665,7 +1670,7 @@ void AssemblerX86::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| EmitComplex(Ty, 1, Operand(dst), imm);
|
| }
|
|
|
| -void AssemblerX86::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1676,7 +1681,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Address &address) {
|
| +void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1687,7 +1692,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Address &address) {
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| +void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedType(Ty)) {
|
| EmitComplexI8(6, Operand(dst), imm);
|
| @@ -1698,7 +1703,7 @@ void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
|
| EmitComplex(Ty, 6, Operand(dst), imm);
|
| }
|
|
|
| -void AssemblerX86::add(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1709,7 +1714,7 @@ void AssemblerX86::add(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::add(Type Ty, GPRRegister reg, const Address &address) {
|
| +void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1720,7 +1725,7 @@ void AssemblerX86::add(Type Ty, GPRRegister reg, const Address &address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::add(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedArithType(Ty)) {
|
| EmitComplexI8(0, Operand(reg), imm);
|
| @@ -1731,7 +1736,7 @@ void AssemblerX86::add(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitComplex(Ty, 0, Operand(reg), imm);
|
| }
|
|
|
| -void AssemblerX86::adc(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1742,7 +1747,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::adc(Type Ty, GPRRegister dst, const Address &address) {
|
| +void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1753,7 +1758,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister dst, const Address &address) {
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -void AssemblerX86::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedArithType(Ty)) {
|
| EmitComplexI8(2, Operand(reg), imm);
|
| @@ -1764,7 +1769,7 @@ void AssemblerX86::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitComplex(Ty, 2, Operand(reg), imm);
|
| }
|
|
|
| -void AssemblerX86::sub(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1775,7 +1780,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::sub(Type Ty, GPRRegister reg, const Address &address) {
|
| +void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1786,7 +1791,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister reg, const Address &address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedArithType(Ty)) {
|
| EmitComplexI8(5, Operand(reg), imm);
|
| @@ -1797,7 +1802,7 @@ void AssemblerX86::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitComplex(Ty, 5, Operand(reg), imm);
|
| }
|
|
|
| -void AssemblerX86::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1808,7 +1813,7 @@ void AssemblerX86::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::sbb(Type Ty, GPRRegister dst, const Address &address) {
|
| +void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1819,7 +1824,7 @@ void AssemblerX86::sbb(Type Ty, GPRRegister dst, const Address &address) {
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -void AssemblerX86::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (isByteSizedArithType(Ty)) {
|
| EmitComplexI8(3, Operand(reg), imm);
|
| @@ -1830,24 +1835,24 @@ void AssemblerX86::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitComplex(Ty, 3, Operand(reg), imm);
|
| }
|
|
|
| -void AssemblerX86::cbw() {
|
| +void AssemblerX8632::cbw() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| EmitUint8(0x98);
|
| }
|
|
|
| -void AssemblerX86::cwd() {
|
| +void AssemblerX8632::cwd() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| EmitUint8(0x99);
|
| }
|
|
|
| -void AssemblerX86::cdq() {
|
| +void AssemblerX8632::cdq() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x99);
|
| }
|
|
|
| -void AssemblerX86::div(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::div(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1858,7 +1863,7 @@ void AssemblerX86::div(Type Ty, GPRRegister reg) {
|
| EmitRegisterOperand(6, reg);
|
| }
|
|
|
| -void AssemblerX86::div(Type Ty, const Address &addr) {
|
| +void AssemblerX8632::div(Type Ty, const Address &addr) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1869,7 +1874,7 @@ void AssemblerX86::div(Type Ty, const Address &addr) {
|
| EmitOperand(6, addr);
|
| }
|
|
|
| -void AssemblerX86::idiv(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::idiv(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1880,7 +1885,7 @@ void AssemblerX86::idiv(Type Ty, GPRRegister reg) {
|
| EmitRegisterOperand(7, reg);
|
| }
|
|
|
| -void AssemblerX86::idiv(Type Ty, const Address &addr) {
|
| +void AssemblerX8632::idiv(Type Ty, const Address &addr) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1891,7 +1896,7 @@ void AssemblerX86::idiv(Type Ty, const Address &addr) {
|
| EmitOperand(7, addr);
|
| }
|
|
|
| -void AssemblerX86::imul(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::imul(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -1901,7 +1906,7 @@ void AssemblerX86::imul(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::imul(Type Ty, GPRRegister reg, const Address &address) {
|
| +void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -1911,7 +1916,7 @@ void AssemblerX86::imul(Type Ty, GPRRegister reg, const Address &address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -1927,7 +1932,7 @@ void AssemblerX86::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::imul(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::imul(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1938,7 +1943,7 @@ void AssemblerX86::imul(Type Ty, GPRRegister reg) {
|
| EmitRegisterOperand(5, reg);
|
| }
|
|
|
| -void AssemblerX86::imul(Type Ty, const Address &address) {
|
| +void AssemblerX8632::imul(Type Ty, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1949,7 +1954,7 @@ void AssemblerX86::imul(Type Ty, const Address &address) {
|
| EmitOperand(5, address);
|
| }
|
|
|
| -void AssemblerX86::mul(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::mul(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1960,7 +1965,7 @@ void AssemblerX86::mul(Type Ty, GPRRegister reg) {
|
| EmitRegisterOperand(4, reg);
|
| }
|
|
|
| -void AssemblerX86::mul(Type Ty, const Address &address) {
|
| +void AssemblerX8632::mul(Type Ty, const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -1971,77 +1976,77 @@ void AssemblerX86::mul(Type Ty, const Address &address) {
|
| EmitOperand(4, address);
|
| }
|
|
|
| -void AssemblerX86::incl(GPRRegister reg) {
|
| +void AssemblerX8632::incl(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x40 + reg);
|
| }
|
|
|
| -void AssemblerX86::incl(const Address &address) {
|
| +void AssemblerX8632::incl(const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(0, address);
|
| }
|
|
|
| -void AssemblerX86::decl(GPRRegister reg) {
|
| +void AssemblerX8632::decl(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x48 + reg);
|
| }
|
|
|
| -void AssemblerX86::decl(const Address &address) {
|
| +void AssemblerX8632::decl(const Address &address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(1, address);
|
| }
|
|
|
| -void AssemblerX86::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitGenericShift(0, Ty, reg, imm);
|
| }
|
|
|
| -void AssemblerX86::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| +void AssemblerX8632::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| EmitGenericShift(0, Ty, Operand(operand), shifter);
|
| }
|
|
|
| -void AssemblerX86::rol(Type Ty, const Address &operand, GPRRegister shifter) {
|
| +void AssemblerX8632::rol(Type Ty, const Address &operand, GPRRegister shifter) {
|
| EmitGenericShift(0, Ty, operand, shifter);
|
| }
|
|
|
| -void AssemblerX86::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitGenericShift(4, Ty, reg, imm);
|
| }
|
|
|
| -void AssemblerX86::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| +void AssemblerX8632::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| EmitGenericShift(4, Ty, Operand(operand), shifter);
|
| }
|
|
|
| -void AssemblerX86::shl(Type Ty, const Address &operand, GPRRegister shifter) {
|
| +void AssemblerX8632::shl(Type Ty, const Address &operand, GPRRegister shifter) {
|
| EmitGenericShift(4, Ty, operand, shifter);
|
| }
|
|
|
| -void AssemblerX86::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitGenericShift(5, Ty, reg, imm);
|
| }
|
|
|
| -void AssemblerX86::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| +void AssemblerX8632::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| EmitGenericShift(5, Ty, Operand(operand), shifter);
|
| }
|
|
|
| -void AssemblerX86::shr(Type Ty, const Address &operand, GPRRegister shifter) {
|
| +void AssemblerX8632::shr(Type Ty, const Address &operand, GPRRegister shifter) {
|
| EmitGenericShift(5, Ty, operand, shifter);
|
| }
|
|
|
| -void AssemblerX86::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| +void AssemblerX8632::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
|
| EmitGenericShift(7, Ty, reg, imm);
|
| }
|
|
|
| -void AssemblerX86::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| +void AssemblerX8632::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
|
| EmitGenericShift(7, Ty, Operand(operand), shifter);
|
| }
|
|
|
| -void AssemblerX86::sar(Type Ty, const Address &address, GPRRegister shifter) {
|
| +void AssemblerX8632::sar(Type Ty, const Address &address, GPRRegister shifter) {
|
| EmitGenericShift(7, Ty, address, shifter);
|
| }
|
|
|
| -void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2051,8 +2056,8 @@ void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| assert(imm.is_int8());
|
| @@ -2064,7 +2069,7 @@ void AssemblerX86::shld(Type Ty, GPRRegister dst, GPRRegister src,
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -void AssemblerX86::shld(Type Ty, const Address &operand, GPRRegister src) {
|
| +void AssemblerX8632::shld(Type Ty, const Address &operand, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2074,7 +2079,7 @@ void AssemblerX86::shld(Type Ty, const Address &operand, GPRRegister src) {
|
| EmitOperand(src, operand);
|
| }
|
|
|
| -void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2084,8 +2089,8 @@ void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| assert(imm.is_int8());
|
| @@ -2097,7 +2102,7 @@ void AssemblerX86::shrd(Type Ty, GPRRegister dst, GPRRegister src,
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -void AssemblerX86::shrd(Type Ty, const Address &dst, GPRRegister src) {
|
| +void AssemblerX8632::shrd(Type Ty, const Address &dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2107,7 +2112,7 @@ void AssemblerX86::shrd(Type Ty, const Address &dst, GPRRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -void AssemblerX86::neg(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::neg(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -2118,7 +2123,7 @@ void AssemblerX86::neg(Type Ty, GPRRegister reg) {
|
| EmitRegisterOperand(3, reg);
|
| }
|
|
|
| -void AssemblerX86::neg(Type Ty, const Address &addr) {
|
| +void AssemblerX8632::neg(Type Ty, const Address &addr) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -2129,13 +2134,13 @@ void AssemblerX86::neg(Type Ty, const Address &addr) {
|
| EmitOperand(3, addr);
|
| }
|
|
|
| -void AssemblerX86::notl(GPRRegister reg) {
|
| +void AssemblerX8632::notl(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitUint8(0xD0 | reg);
|
| }
|
|
|
| -void AssemblerX86::bswap(Type Ty, GPRRegister reg) {
|
| +void AssemblerX8632::bswap(Type Ty, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i32);
|
| (void)Ty;
|
| @@ -2143,7 +2148,7 @@ void AssemblerX86::bswap(Type Ty, GPRRegister reg) {
|
| EmitUint8(0xC8 | reg);
|
| }
|
|
|
| -void AssemblerX86::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2153,7 +2158,7 @@ void AssemblerX86::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::bsf(Type Ty, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2163,7 +2168,7 @@ void AssemblerX86::bsf(Type Ty, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
|
| +void AssemblerX8632::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2173,7 +2178,7 @@ void AssemblerX86::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::bsr(Type Ty, GPRRegister dst, const Address &src) {
|
| +void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const Address &src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(Ty == IceType_i16 || Ty == IceType_i32);
|
| if (Ty == IceType_i16)
|
| @@ -2183,19 +2188,19 @@ void AssemblerX86::bsr(Type Ty, GPRRegister dst, const Address &src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -void AssemblerX86::bt(GPRRegister base, GPRRegister offset) {
|
| +void AssemblerX8632::bt(GPRRegister base, GPRRegister offset) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xA3);
|
| EmitRegisterOperand(offset, base);
|
| }
|
|
|
| -void AssemblerX86::ret() {
|
| +void AssemblerX8632::ret() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC3);
|
| }
|
|
|
| -void AssemblerX86::ret(const Immediate &imm) {
|
| +void AssemblerX8632::ret(const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC2);
|
| assert(imm.is_uint16());
|
| @@ -2203,7 +2208,7 @@ void AssemblerX86::ret(const Immediate &imm) {
|
| EmitUint8((imm.value() >> 8) & 0xFF);
|
| }
|
|
|
| -void AssemblerX86::nop(int size) {
|
| +void AssemblerX8632::nop(int size) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // There are nops up to size 15, but for now just provide up to size 8.
|
| assert(0 < size && size <= MAX_NOP_SIZE);
|
| @@ -2265,23 +2270,23 @@ void AssemblerX86::nop(int size) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::int3() {
|
| +void AssemblerX8632::int3() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xCC);
|
| }
|
|
|
| -void AssemblerX86::hlt() {
|
| +void AssemblerX8632::hlt() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF4);
|
| }
|
|
|
| -void AssemblerX86::ud2() {
|
| +void AssemblerX8632::ud2() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x0B);
|
| }
|
|
|
| -void AssemblerX86::j(CondX86::BrCond condition, Label *label, bool near) {
|
| +void AssemblerX8632::j(CondX86::BrCond condition, Label *label, bool near) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (label->IsBound()) {
|
| static const int kShortSize = 2;
|
| @@ -2313,8 +2318,8 @@ void AssemblerX86::j(CondX86::BrCond condition, Label *label, bool near) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::j(CondX86::BrCond condition,
|
| - const ConstantRelocatable *label) {
|
| +void AssemblerX8632::j(CondX86::BrCond condition,
|
| + const ConstantRelocatable *label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0x80 + condition);
|
| @@ -2322,13 +2327,13 @@ void AssemblerX86::j(CondX86::BrCond condition,
|
| EmitInt32(-4);
|
| }
|
|
|
| -void AssemblerX86::jmp(GPRRegister reg) {
|
| +void AssemblerX8632::jmp(GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitRegisterOperand(4, reg);
|
| }
|
|
|
| -void AssemblerX86::jmp(Label *label, bool near) {
|
| +void AssemblerX8632::jmp(Label *label, bool near) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (label->IsBound()) {
|
| static const int kShortSize = 2;
|
| @@ -2351,27 +2356,27 @@ void AssemblerX86::jmp(Label *label, bool near) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::jmp(const ConstantRelocatable *label) {
|
| +void AssemblerX8632::jmp(const ConstantRelocatable *label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xE9);
|
| EmitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
|
| EmitInt32(-4);
|
| }
|
|
|
| -void AssemblerX86::mfence() {
|
| +void AssemblerX8632::mfence() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xAE);
|
| EmitUint8(0xF0);
|
| }
|
|
|
| -void AssemblerX86::lock() {
|
| +void AssemblerX8632::lock() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF0);
|
| }
|
|
|
| -void AssemblerX86::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
|
| - bool Locked) {
|
| +void AssemblerX8632::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
|
| + bool Locked) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -2385,7 +2390,7 @@ void AssemblerX86::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -void AssemblerX86::cmpxchg8b(const Address &address, bool Locked) {
|
| +void AssemblerX8632::cmpxchg8b(const Address &address, bool Locked) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Locked)
|
| EmitUint8(0xF0);
|
| @@ -2394,8 +2399,8 @@ void AssemblerX86::cmpxchg8b(const Address &address, bool Locked) {
|
| EmitOperand(1, address);
|
| }
|
|
|
| -void AssemblerX86::xadd(Type Ty, const Address &addr, GPRRegister reg,
|
| - bool Locked) {
|
| +void AssemblerX8632::xadd(Type Ty, const Address &addr, GPRRegister reg,
|
| + bool Locked) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -2409,7 +2414,7 @@ void AssemblerX86::xadd(Type Ty, const Address &addr, GPRRegister reg,
|
| EmitOperand(reg, addr);
|
| }
|
|
|
| -void AssemblerX86::xchg(Type Ty, const Address &addr, GPRRegister reg) {
|
| +void AssemblerX8632::xchg(Type Ty, const Address &addr, GPRRegister reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (Ty == IceType_i16)
|
| EmitOperandSizeOverride();
|
| @@ -2420,12 +2425,12 @@ void AssemblerX86::xchg(Type Ty, const Address &addr, GPRRegister reg) {
|
| EmitOperand(reg, addr);
|
| }
|
|
|
| -void AssemblerX86::EmitSegmentOverride(uint8_t prefix) {
|
| +void AssemblerX8632::EmitSegmentOverride(uint8_t prefix) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(prefix);
|
| }
|
|
|
| -void AssemblerX86::Align(intptr_t alignment, intptr_t offset) {
|
| +void AssemblerX8632::Align(intptr_t alignment, intptr_t offset) {
|
| assert(llvm::isPowerOf2_32(alignment));
|
| intptr_t pos = offset + buffer_.GetPosition();
|
| intptr_t mod = pos & (alignment - 1);
|
| @@ -2443,7 +2448,7 @@ void AssemblerX86::Align(intptr_t alignment, intptr_t offset) {
|
| assert(((offset + buffer_.GetPosition()) & (alignment - 1)) == 0);
|
| }
|
|
|
| -void AssemblerX86::Bind(Label *label) {
|
| +void AssemblerX8632::Bind(Label *label) {
|
| intptr_t bound = buffer_.Size();
|
| assert(!label->IsBound()); // Labels can only be bound once.
|
| while (label->IsLinked()) {
|
| @@ -2461,7 +2466,7 @@ void AssemblerX86::Bind(Label *label) {
|
| label->BindTo(bound);
|
| }
|
|
|
| -void AssemblerX86::EmitOperand(int rm, const Operand &operand) {
|
| +void AssemblerX8632::EmitOperand(int rm, const Operand &operand) {
|
| assert(rm >= 0 && rm < 8);
|
| const intptr_t length = operand.length_;
|
| assert(length > 0);
|
| @@ -2477,7 +2482,7 @@ void AssemblerX86::EmitOperand(int rm, const Operand &operand) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitImmediate(Type Ty, const Immediate &imm) {
|
| +void AssemblerX8632::EmitImmediate(Type Ty, const Immediate &imm) {
|
| if (Ty == IceType_i16) {
|
| assert(!imm.fixup());
|
| EmitInt16(imm.value());
|
| @@ -2489,8 +2494,8 @@ void AssemblerX86::EmitImmediate(Type Ty, const Immediate &imm) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitComplexI8(int rm, const Operand &operand,
|
| - const Immediate &immediate) {
|
| +void AssemblerX8632::EmitComplexI8(int rm, const Operand &operand,
|
| + const Immediate &immediate) {
|
| assert(rm >= 0 && rm < 8);
|
| assert(immediate.is_int8());
|
| if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
|
| @@ -2505,8 +2510,8 @@ void AssemblerX86::EmitComplexI8(int rm, const Operand &operand,
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitComplex(Type Ty, int rm, const Operand &operand,
|
| - const Immediate &immediate) {
|
| +void AssemblerX8632::EmitComplex(Type Ty, int rm, const Operand &operand,
|
| + const Immediate &immediate) {
|
| assert(rm >= 0 && rm < 8);
|
| if (immediate.is_int8()) {
|
| // Use sign-extended 8-bit immediate.
|
| @@ -2524,7 +2529,7 @@ void AssemblerX86::EmitComplex(Type Ty, int rm, const Operand &operand,
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitLabel(Label *label, intptr_t instruction_size) {
|
| +void AssemblerX8632::EmitLabel(Label *label, intptr_t instruction_size) {
|
| if (label->IsBound()) {
|
| intptr_t offset = label->Position() - buffer_.Size();
|
| assert(offset <= 0);
|
| @@ -2534,7 +2539,7 @@ void AssemblerX86::EmitLabel(Label *label, intptr_t instruction_size) {
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitLabelLink(Label *label) {
|
| +void AssemblerX8632::EmitLabelLink(Label *label) {
|
| assert(!label->IsBound());
|
| intptr_t position = buffer_.Size();
|
| EmitInt32(label->position_);
|
| @@ -2542,7 +2547,7 @@ void AssemblerX86::EmitLabelLink(Label *label) {
|
| label->LinkTo(position);
|
| }
|
|
|
| -void AssemblerX86::EmitNearLabelLink(Label *label) {
|
| +void AssemblerX8632::EmitNearLabelLink(Label *label) {
|
| assert(!label->IsBound());
|
| intptr_t position = buffer_.Size();
|
| EmitUint8(0);
|
| @@ -2550,8 +2555,8 @@ void AssemblerX86::EmitNearLabelLink(Label *label) {
|
| label->NearLinkTo(position);
|
| }
|
|
|
| -void AssemblerX86::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
|
| - const Immediate &imm) {
|
| +void AssemblerX8632::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
|
| + const Immediate &imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(imm.is_int8());
|
| if (Ty == IceType_i16)
|
| @@ -2566,8 +2571,8 @@ void AssemblerX86::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
|
| }
|
| }
|
|
|
| -void AssemblerX86::EmitGenericShift(int rm, Type Ty, const Operand &operand,
|
| - GPRRegister shifter) {
|
| +void AssemblerX8632::EmitGenericShift(int rm, Type Ty, const Operand &operand,
|
| + GPRRegister shifter) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| assert(shifter == RegX8632::Encoded_Reg_ecx);
|
| (void)shifter;
|
| @@ -2577,5 +2582,5 @@ void AssemblerX86::EmitGenericShift(int rm, Type Ty, const Operand &operand,
|
| EmitOperand(rm, operand);
|
| }
|
|
|
| -} // end of namespace x86
|
| +} // end of namespace X8632
|
| } // end of namespace Ice
|
|
|