Rename AssemblerX86 to AssemblerX8632 so it works with SZTargets.def.

src/assembler_ia32.h

 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 20 matching lines @@
 
 #include "assembler.h"
 
 namespace Ice {
 
 using RegX8632::GPRRegister;
 using RegX8632::XmmRegister;
 using RegX8632::ByteRegister;
 using RegX8632::X87STRegister;
 
-namespace x86 {
+namespace X8632 {
 
 const int MAX_NOP_SIZE = 8;
 
 enum ScaleFactor { TIMES_1 = 0, TIMES_2 = 1, TIMES_4 = 2, TIMES_8 = 3 };
 
 class Immediate {
   Immediate(const Immediate &) = delete;
   Immediate &operator=(const Immediate &) = delete;
 
 public:
@@ skipping 111 matching lines @@
     return encoding_[index];
   }
 
   // Returns whether or not this operand is really the given register in
   // disguise. Used from the assembler to generate better encodings.
   bool IsRegister(GPRRegister reg) const {
     return ((encoding_[0] & 0xF8) == 0xC0) // Addressing mode is register only.
            && ((encoding_[0] & 0x07) == reg); // Register codes match.
   }
 
-  friend class AssemblerX86;
+  friend class AssemblerX8632;
 };
 
 class Address : public Operand {
 public:
   Address(const Address &other) : Operand(other) {}
 
   Address &operator=(const Address &other) {
     Operand::operator=(other);
     return *this;
   }
@@ skipping 139 matching lines @@
   }
 
   static const int kMaxUnresolvedBranches = 20;
 
   intptr_t position_;
   intptr_t num_unresolved_;
   // TODO(stichnot,jvoung): Can this instead be
   // llvm::SmallVector<intptr_t, kMaxUnresolvedBranches> ?
   intptr_t unresolved_near_positions_[kMaxUnresolvedBranches];
 
-  friend class AssemblerX86;
+  friend class AssemblerX8632;
 };
 
-class AssemblerX86 : public Assembler {
-  AssemblerX86(const AssemblerX86 &) = delete;
-  AssemblerX86 &operator=(const AssemblerX86 &) = delete;
+class AssemblerX8632 : public Assembler {
+  AssemblerX8632(const AssemblerX8632 &) = delete;
+  AssemblerX8632 &operator=(const AssemblerX8632 &) = delete;
 
 public:
-  explicit AssemblerX86(bool use_far_branches = false) : Assembler() {
+  explicit AssemblerX8632(bool use_far_branches = false) : Assembler() {
     // This mode is only needed and implemented for MIPS and ARM.
     assert(!use_far_branches);
     (void)use_far_branches;
   }
-  ~AssemblerX86() override;
+  ~AssemblerX8632() override;
 
   static const bool kNearJump = true;
   static const bool kFarJump = false;
 
   void alignFunction() override;
 
   SizeT getBundleAlignLog2Bytes() const override { return 5; }
 
   llvm::ArrayRef<uint8_t> getNonExecBundlePadding() const override {
     static const uint8_t Padding[] = {0xF4};
@@ skipping 13 matching lines @@
   void BindCfgNodeLabel(SizeT NodeNumber) override;
   Label *GetOrCreateLocalLabel(SizeT Number);
   void BindLocalLabel(SizeT Number);
 
   bool fixupIsPCRel(FixupKind Kind) const override {
     // Currently assuming this is the only PC-rel relocation type used.
     return Kind == llvm::ELF::R_386_PC32;
   }
 
   // Operations to emit GPR instructions (and dispatch on operand type).
-  typedef void (AssemblerX86::*TypedEmitGPR)(Type, GPRRegister);
-  typedef void (AssemblerX86::*TypedEmitAddr)(Type, const Address &);
+  typedef void (AssemblerX8632::*TypedEmitGPR)(Type, GPRRegister);
+  typedef void (AssemblerX8632::*TypedEmitAddr)(Type, const Address &);
   struct GPREmitterOneOp {
     TypedEmitGPR Reg;
     TypedEmitAddr Addr;
   };
 
-  typedef void (AssemblerX86::*TypedEmitGPRGPR)(Type, GPRRegister, GPRRegister);
-  typedef void (AssemblerX86::*TypedEmitGPRAddr)(Type, GPRRegister,
-                                                 const Address &);
-  typedef void (AssemblerX86::*TypedEmitGPRImm)(Type, GPRRegister,
-                                                const Immediate &);
+  typedef void (AssemblerX8632::*TypedEmitGPRGPR)(Type, GPRRegister,
+                                                  GPRRegister);
+  typedef void (AssemblerX8632::*TypedEmitGPRAddr)(Type, GPRRegister,
+                                                   const Address &);
+  typedef void (AssemblerX8632::*TypedEmitGPRImm)(Type, GPRRegister,
+                                                  const Immediate &);
   struct GPREmitterRegOp {
     TypedEmitGPRGPR GPRGPR;
     TypedEmitGPRAddr GPRAddr;
     TypedEmitGPRImm GPRImm;
   };
 
   struct GPREmitterShiftOp {
     // Technically, Addr/GPR and Addr/Imm are also allowed, but */Addr are not.
     // In practice, we always normalize the Dest to a Register first.
     TypedEmitGPRGPR GPRGPR;
     TypedEmitGPRImm GPRImm;
   };
 
-  typedef void (AssemblerX86::*TypedEmitGPRGPRImm)(Type, GPRRegister,
-                                                   GPRRegister,
-                                                   const Immediate &);
+  typedef void (AssemblerX8632::*TypedEmitGPRGPRImm)(Type, GPRRegister,
+                                                     GPRRegister,
+                                                     const Immediate &);
   struct GPREmitterShiftD {
     // Technically AddrGPR and AddrGPRImm are also allowed, but in practice
     // we always normalize Dest to a Register first.
     TypedEmitGPRGPR GPRGPR;
     TypedEmitGPRGPRImm GPRGPRImm;
   };
 
-  typedef void (AssemblerX86::*TypedEmitAddrGPR)(Type, const Address &,
-                                                 GPRRegister);
-  typedef void (AssemblerX86::*TypedEmitAddrImm)(Type, const Address &,
-                                                 const Immediate &);
+  typedef void (AssemblerX8632::*TypedEmitAddrGPR)(Type, const Address &,
+                                                   GPRRegister);
+  typedef void (AssemblerX8632::*TypedEmitAddrImm)(Type, const Address &,
+                                                   const Immediate &);
   struct GPREmitterAddrOp {
     TypedEmitAddrGPR AddrGPR;
     TypedEmitAddrImm AddrImm;
   };
 
   // Operations to emit XMM instructions (and dispatch on operand type).
-  typedef void (AssemblerX86::*TypedEmitXmmXmm)(Type, XmmRegister, XmmRegister);
-  typedef void (AssemblerX86::*TypedEmitXmmAddr)(Type, XmmRegister,
-                                                 const Address &);
+  typedef void (AssemblerX8632::*TypedEmitXmmXmm)(Type, XmmRegister,
+                                                  XmmRegister);
+  typedef void (AssemblerX8632::*TypedEmitXmmAddr)(Type, XmmRegister,
+                                                   const Address &);
   struct XmmEmitterRegOp {
     TypedEmitXmmXmm XmmXmm;
     TypedEmitXmmAddr XmmAddr;
   };
 
-  typedef void (AssemblerX86::*EmitXmmXmm)(XmmRegister, XmmRegister);
-  typedef void (AssemblerX86::*EmitXmmAddr)(XmmRegister, const Address &);
-  typedef void (AssemblerX86::*EmitAddrXmm)(const Address &, XmmRegister);
+  typedef void (AssemblerX8632::*EmitXmmXmm)(XmmRegister, XmmRegister);
+  typedef void (AssemblerX8632::*EmitXmmAddr)(XmmRegister, const Address &);
+  typedef void (AssemblerX8632::*EmitAddrXmm)(const Address &, XmmRegister);
   struct XmmEmitterMovOps {
     EmitXmmXmm XmmXmm;
     EmitXmmAddr XmmAddr;
     EmitAddrXmm AddrXmm;
   };
 
-  typedef void (AssemblerX86::*TypedEmitXmmImm)(Type, XmmRegister,
-                                                const Immediate &);
+  typedef void (AssemblerX8632::*TypedEmitXmmImm)(Type, XmmRegister,
+                                                  const Immediate &);
 
   struct XmmEmitterShiftOp {
     TypedEmitXmmXmm XmmXmm;
     TypedEmitXmmAddr XmmAddr;
     TypedEmitXmmImm XmmImm;
   };
 
   // Cross Xmm/GPR cast instructions.
   template <typename DReg_t, typename SReg_t> struct CastEmitterRegOp {
-    typedef void (AssemblerX86::*TypedEmitRegs)(Type, DReg_t, SReg_t);
-    typedef void (AssemblerX86::*TypedEmitAddr)(Type, DReg_t, const Address &);
+    typedef void (AssemblerX8632::*TypedEmitRegs)(Type, DReg_t, SReg_t);
+    typedef void (AssemblerX8632::*TypedEmitAddr)(Type, DReg_t,
+                                                  const Address &);
 
     TypedEmitRegs RegReg;
     TypedEmitAddr RegAddr;
   };
 
   // Three operand (potentially) cross Xmm/GPR instructions.
   // The last operand must be an immediate.
   template <typename DReg_t, typename SReg_t> struct ThreeOpImmEmitter {
-    typedef void (AssemblerX86::*TypedEmitRegRegImm)(Type, DReg_t, SReg_t,
-                                                     const Immediate &);
-    typedef void (AssemblerX86::*TypedEmitRegAddrImm)(Type, DReg_t,
-                                                      const Address &,
-                                                      const Immediate &);
+    typedef void (AssemblerX8632::*TypedEmitRegRegImm)(Type, DReg_t, SReg_t,
+                                                       const Immediate &);
+    typedef void (AssemblerX8632::*TypedEmitRegAddrImm)(Type, DReg_t,
+                                                        const Address &,
+                                                        const Immediate &);
 
     TypedEmitRegRegImm RegRegImm;
     TypedEmitRegAddrImm RegAddrImm;
   };
 
   /*
    * Emit Machine Instructions.
    */
   void call(GPRRegister reg);
   void call(const Address &address);
@@ skipping 368 matching lines @@
 
   typedef std::vector<Label *> LabelVector;
   // A vector of pool-allocated x86 labels for CFG nodes.
   LabelVector CfgNodeLabels;
   // A vector of pool-allocated x86 labels for Local labels.
   LabelVector LocalLabels;
 
   Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
 };
 
-inline void AssemblerX86::EmitUint8(uint8_t value) {
+inline void AssemblerX8632::EmitUint8(uint8_t value) {
   buffer_.Emit<uint8_t>(value);
 }
 
-inline void AssemblerX86::EmitInt16(int16_t value) {
+inline void AssemblerX8632::EmitInt16(int16_t value) {
   buffer_.Emit<int16_t>(value);
 }
 
-inline void AssemblerX86::EmitInt32(int32_t value) {
+inline void AssemblerX8632::EmitInt32(int32_t value) {
   buffer_.Emit<int32_t>(value);
 }
 
-inline void AssemblerX86::EmitRegisterOperand(int rm, int reg) {
+inline void AssemblerX8632::EmitRegisterOperand(int rm, int reg) {
   assert(rm >= 0 && rm < 8);
   buffer_.Emit<uint8_t>(0xC0 + (rm << 3) + reg);
 }
 
-inline void AssemblerX86::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
+inline void AssemblerX8632::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
   EmitRegisterOperand(rm, static_cast<GPRRegister>(reg));
 }
 
-inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) {
+inline void AssemblerX8632::EmitFixup(AssemblerFixup *fixup) {
   buffer_.EmitFixup(fixup);
 }
 
-inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); }
+inline void AssemblerX8632::EmitOperandSizeOverride() { EmitUint8(0x66); }
 
-} // end of namespace x86
+} // end of namespace X8632
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H