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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 1114223002: Rename AssemblerX86 to AssemblerX8632 so it works with SZTargets.def. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 7 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
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511 llvm_unreachable("Infinite-weight Variable has no register assigned"); 511 llvm_unreachable("Infinite-weight Variable has no register assigned");
512 const Type Ty = IceType_i32; 512 const Type Ty = IceType_i32;
513 int32_t Offset = Var->getStackOffset(); 513 int32_t Offset = Var->getStackOffset();
514 if (!hasFramePointer()) 514 if (!hasFramePointer())
515 Offset += getStackAdjustment(); 515 Offset += getStackAdjustment();
516 if (Offset) 516 if (Offset)
517 Str << Offset; 517 Str << Offset;
518 Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")"; 518 Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")";
519 } 519 }
520 520
521 x86::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const { 521 X8632::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
522 if (Var->hasReg()) 522 if (Var->hasReg())
523 llvm_unreachable("Stack Variable has a register assigned"); 523 llvm_unreachable("Stack Variable has a register assigned");
524 if (Var->getWeight().isInf()) 524 if (Var->getWeight().isInf())
525 llvm_unreachable("Infinite-weight Variable has no register assigned"); 525 llvm_unreachable("Infinite-weight Variable has no register assigned");
526 int32_t Offset = Var->getStackOffset(); 526 int32_t Offset = Var->getStackOffset();
527 if (!hasFramePointer()) 527 if (!hasFramePointer())
528 Offset += getStackAdjustment(); 528 Offset += getStackAdjustment();
529 return x86::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset); 529 return X8632::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset);
530 } 530 }
531 531
532 void TargetX8632::lowerArguments() { 532 void TargetX8632::lowerArguments() {
533 VarList &Args = Func->getArgs(); 533 VarList &Args = Func->getArgs();
534 // The first four arguments of vector type, regardless of their 534 // The first four arguments of vector type, regardless of their
535 // position relative to the other arguments in the argument list, are 535 // position relative to the other arguments in the argument list, are
536 // passed in registers xmm0 - xmm3. 536 // passed in registers xmm0 - xmm3.
537 unsigned NumXmmArgs = 0; 537 unsigned NumXmmArgs = 0;
538 538
539 Context.init(Func->getEntryNode()); 539 Context.init(Func->getEntryNode());
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4887 case FT_Asm: 4887 case FT_Asm:
4888 case FT_Iasm: { 4888 case FT_Iasm: {
4889 OstreamLocker L(Ctx); 4889 OstreamLocker L(Ctx);
4890 emitConstantPool<PoolTypeConverter<float>>(Ctx); 4890 emitConstantPool<PoolTypeConverter<float>>(Ctx);
4891 emitConstantPool<PoolTypeConverter<double>>(Ctx); 4891 emitConstantPool<PoolTypeConverter<double>>(Ctx);
4892 } break; 4892 } break;
4893 } 4893 }
4894 } 4894 }
4895 4895
4896 } // end of namespace Ice 4896 } // end of namespace Ice
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