DescriptionSubzero: Produce actually correct code in --asm-verbose mode.
The "pnacl-sz --asm-verbose=1" mode annotates the asm output with physical register liveness information, including which registers are live at the beginning and end of each basic block, and which registers' live ranges end at each instruction. Computing this information requires a final liveness analysis pass. One of the side effects of liveness analysis is to remove dead instructions, which happens when the instruction's dest variable is not live and the instruction lacks important side effects.
In some cases, direct manipulation of physical registers was missing extra fakedef/fakeuse/etc., and as as result these instructions could be eliminated, leading to incorrect code. Without --asm-verbose, these instructions were being created after the last run of liveness analysis, so they had no chance of being eliminated and everything was fine. But with --asm-verbose, some instructions would be eliminated.
This CL fixes the omissions so that the resulting code is runnable.
An alternative would be to add a flag to liveness analysis directing it not to dead-code eliminate any more instructions. However, it's better to get the liveness right in case future late-stage optimizations rely on it.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4135
TEST= pydir/szbuild_spec2k.py --filetype=asm -v --sz=--asm-verbose=1 --force
R=jvoung@chromium.org, kschimpf@google.com
Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=76dcf1a858757e6496bf55a5811ccb56ff06b028
Patch Set 1 #
Total comments: 2
Patch Set 2 : Expand asm-verbose comments #
Messages
Total messages: 6 (1 generated)
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