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Issue 11090021: Improve page flag checking sequence on ARM. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Addressed comments. Created 8 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 345 matching lines...) Expand 10 before | Expand all | Expand 10 after
356 bic(dst, dst, Operand(mask)); 356 bic(dst, dst, Operand(mask));
357 and_(scratch, src, Operand((1 << width) - 1)); 357 and_(scratch, src, Operand((1 << width) - 1));
358 mov(scratch, Operand(scratch, LSL, lsb)); 358 mov(scratch, Operand(scratch, LSL, lsb));
359 orr(dst, dst, scratch); 359 orr(dst, dst, scratch);
360 } else { 360 } else {
361 bfi(dst, src, lsb, width, cond); 361 bfi(dst, src, lsb, width, cond);
362 } 362 }
363 } 363 }
364 364
365 365
366 void MacroAssembler::Bfc(Register dst, int lsb, int width, Condition cond) { 366 void MacroAssembler::Bfc(Register dst, Register src, int lsb, int width,
367 Condition cond) {
367 ASSERT(lsb < 32); 368 ASSERT(lsb < 32);
368 if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) { 369 if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
369 int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1); 370 int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);
370 bic(dst, dst, Operand(mask)); 371 bic(dst, src, Operand(mask));
371 } else { 372 } else {
373 Move(dst, src, cond);
372 bfc(dst, lsb, width, cond); 374 bfc(dst, lsb, width, cond);
373 } 375 }
374 } 376 }
375 377
376 378
377 void MacroAssembler::Usat(Register dst, int satpos, const Operand& src, 379 void MacroAssembler::Usat(Register dst, int satpos, const Operand& src,
378 Condition cond) { 380 Condition cond) {
379 if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) { 381 if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {
380 ASSERT(!dst.is(pc) && !src.rm().is(pc)); 382 ASSERT(!dst.is(pc) && !src.rm().is(pc));
381 ASSERT((satpos >= 0) && (satpos <= 31)); 383 ASSERT((satpos >= 0) && (satpos <= 31));
(...skipping 3108 matching lines...) Expand 10 before | Expand all | Expand 10 after
3490 add(result, result, Operand(kPCRegOffset)); 3492 add(result, result, Operand(kPCRegOffset));
3491 } 3493 }
3492 3494
3493 3495
3494 void MacroAssembler::CheckPageFlag( 3496 void MacroAssembler::CheckPageFlag(
3495 Register object, 3497 Register object,
3496 Register scratch, 3498 Register scratch,
3497 int mask, 3499 int mask,
3498 Condition cc, 3500 Condition cc,
3499 Label* condition_met) { 3501 Label* condition_met) {
3500 and_(scratch, object, Operand(~Page::kPageAlignmentMask)); 3502 Bfc(scratch, object, 0, kPageSizeBits);
3501 ldr(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset)); 3503 ldr(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
3502 tst(scratch, Operand(mask)); 3504 tst(scratch, Operand(mask));
3503 b(cc, condition_met); 3505 b(cc, condition_met);
3504 } 3506 }
3505 3507
3506 3508
3507 void MacroAssembler::JumpIfBlack(Register object, 3509 void MacroAssembler::JumpIfBlack(Register object,
3508 Register scratch0, 3510 Register scratch0,
3509 Register scratch1, 3511 Register scratch1,
3510 Label* on_black) { 3512 Label* on_black) {
(...skipping 343 matching lines...) Expand 10 before | Expand all | Expand 10 after
3854 void CodePatcher::EmitCondition(Condition cond) { 3856 void CodePatcher::EmitCondition(Condition cond) {
3855 Instr instr = Assembler::instr_at(masm_.pc_); 3857 Instr instr = Assembler::instr_at(masm_.pc_);
3856 instr = (instr & ~kCondMask) | cond; 3858 instr = (instr & ~kCondMask) | cond;
3857 masm_.emit(instr); 3859 masm_.emit(instr);
3858 } 3860 }
3859 3861
3860 3862
3861 } } // namespace v8::internal 3863 } } // namespace v8::internal
3862 3864
3863 #endif // V8_TARGET_ARCH_ARM 3865 #endif // V8_TARGET_ARCH_ARM
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