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Issue 1108583003: MIPS: Add rounding support in simulator and RINT instruction. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Addressed comments Created 5 years, 7 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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480 480
481 // For currently unimplemented decodings the disassembler calls Unknown(instr) 481 // For currently unimplemented decodings the disassembler calls Unknown(instr)
482 // which will just print "unknown" of the instruction bits. 482 // which will just print "unknown" of the instruction bits.
483 void Decoder::Unknown(Instruction* instr) { 483 void Decoder::Unknown(Instruction* instr) {
484 Format(instr, "unknown"); 484 Format(instr, "unknown");
485 } 485 }
486 486
487 487
488 bool Decoder::DecodeTypeRegisterRsType(Instruction* instr) { 488 bool Decoder::DecodeTypeRegisterRsType(Instruction* instr) {
489 switch (instr->FunctionFieldRaw()) { 489 switch (instr->FunctionFieldRaw()) {
490 case RINT:
491 Format(instr, "rint.'t 'fd, 'fs");
492 break;
490 case MIN: 493 case MIN:
491 Format(instr, "min.'t 'fd, 'fs, 'ft"); 494 Format(instr, "min.'t 'fd, 'fs, 'ft");
492 break; 495 break;
493 case MAX: 496 case MAX:
494 Format(instr, "max.'t 'fd, 'fs, 'ft"); 497 Format(instr, "max.'t 'fd, 'fs, 'ft");
495 break; 498 break;
496 case MINA: 499 case MINA:
497 Format(instr, "mina.'t 'fd, 'fs, 'ft"); 500 Format(instr, "mina.'t 'fd, 'fs, 'ft");
498 break; 501 break;
499 case MAXA: 502 case MAXA:
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1352 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1355 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1353 } 1356 }
1354 } 1357 }
1355 1358
1356 1359
1357 #undef UNSUPPORTED 1360 #undef UNSUPPORTED
1358 1361
1359 } // namespace disasm 1362 } // namespace disasm
1360 1363
1361 #endif // V8_TARGET_ARCH_MIPS 1364 #endif // V8_TARGET_ARCH_MIPS
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