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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 2401 void Assembler::ceil_w_s(FPURegister fd, FPURegister fs) { | 2401 void Assembler::ceil_w_s(FPURegister fd, FPURegister fs) { |
| 2402 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S); | 2402 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S); |
| 2403 } | 2403 } |
| 2404 | 2404 |
| 2405 | 2405 |
| 2406 void Assembler::ceil_w_d(FPURegister fd, FPURegister fs) { | 2406 void Assembler::ceil_w_d(FPURegister fd, FPURegister fs) { |
| 2407 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); | 2407 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); |
| 2408 } | 2408 } |
| 2409 | 2409 |
| 2410 | 2410 |
| 2411 void Assembler::rint(SecondaryField fmt, FPURegister fd, FPURegister fs) { |
| 2412 DCHECK(kArchVariant == kMips64r6); |
| 2413 DCHECK((fmt == D) || (fmt == S)); |
| 2414 GenInstrRegister(COP1, fmt, f0, fs, fd, RINT); |
| 2415 } |
| 2416 |
| 2417 |
| 2411 void Assembler::cvt_l_s(FPURegister fd, FPURegister fs) { | 2418 void Assembler::cvt_l_s(FPURegister fd, FPURegister fs) { |
| 2412 DCHECK(kArchVariant == kMips64r2); | 2419 DCHECK(kArchVariant == kMips64r2); |
| 2413 GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S); | 2420 GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S); |
| 2414 } | 2421 } |
| 2415 | 2422 |
| 2416 | 2423 |
| 2417 void Assembler::cvt_l_d(FPURegister fd, FPURegister fs) { | 2424 void Assembler::cvt_l_d(FPURegister fd, FPURegister fs) { |
| 2418 DCHECK(kArchVariant == kMips64r2); | 2425 DCHECK(kArchVariant == kMips64r2); |
| 2419 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D); | 2426 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D); |
| 2420 } | 2427 } |
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| 2899 void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) { | 2906 void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) { |
| 2900 // No out-of-line constant pool support. | 2907 // No out-of-line constant pool support. |
| 2901 DCHECK(!FLAG_enable_ool_constant_pool); | 2908 DCHECK(!FLAG_enable_ool_constant_pool); |
| 2902 return; | 2909 return; |
| 2903 } | 2910 } |
| 2904 | 2911 |
| 2905 | 2912 |
| 2906 } } // namespace v8::internal | 2913 } } // namespace v8::internal |
| 2907 | 2914 |
| 2908 #endif // V8_TARGET_ARCH_MIPS64 | 2915 #endif // V8_TARGET_ARCH_MIPS64 |
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