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Issue 1108583003: MIPS: Add rounding support in simulator and RINT instruction. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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2199 void Assembler::ceil_w_s(FPURegister fd, FPURegister fs) { 2199 void Assembler::ceil_w_s(FPURegister fd, FPURegister fs) {
2200 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S); 2200 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S);
2201 } 2201 }
2202 2202
2203 2203
2204 void Assembler::ceil_w_d(FPURegister fd, FPURegister fs) { 2204 void Assembler::ceil_w_d(FPURegister fd, FPURegister fs) {
2205 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); 2205 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D);
2206 } 2206 }
2207 2207
2208 2208
2209 void Assembler::rint(SecondaryField fmt, FPURegister fd, FPURegister fs) {
2210 DCHECK(kArchVariant == kMips32r6);
2211 DCHECK((fmt == D) || (fmt == S));
2212 GenInstrRegister(COP1, fmt, f0, fs, fd, RINT);
2213 }
2214
2215
2209 void Assembler::cvt_l_s(FPURegister fd, FPURegister fs) { 2216 void Assembler::cvt_l_s(FPURegister fd, FPURegister fs) {
2210 DCHECK(IsMipsArchVariant(kMips32r2)); 2217 DCHECK(IsMipsArchVariant(kMips32r2));
2211 GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S); 2218 GenInstrRegister(COP1, S, f0, fs, fd, CVT_L_S);
2212 } 2219 }
2213 2220
2214 2221
2215 void Assembler::cvt_l_d(FPURegister fd, FPURegister fs) { 2222 void Assembler::cvt_l_d(FPURegister fd, FPURegister fs) {
2216 DCHECK(IsMipsArchVariant(kMips32r2)); 2223 DCHECK(IsMipsArchVariant(kMips32r2));
2217 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D); 2224 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D);
2218 } 2225 }
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2791 void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) { 2798 void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) {
2792 // No out-of-line constant pool support. 2799 // No out-of-line constant pool support.
2793 DCHECK(!FLAG_enable_ool_constant_pool); 2800 DCHECK(!FLAG_enable_ool_constant_pool);
2794 return; 2801 return;
2795 } 2802 }
2796 2803
2797 2804
2798 } } // namespace v8::internal 2805 } } // namespace v8::internal
2799 2806
2800 #endif // V8_TARGET_ARCH_MIPS 2807 #endif // V8_TARGET_ARCH_MIPS
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