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1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_IA32) | 6 #if defined(TARGET_ARCH_IA32) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/heap.h" | 9 #include "vm/heap.h" |
10 #include "vm/memory_region.h" | 10 #include "vm/memory_region.h" |
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1217 void Assembler::shll(Register reg, const Immediate& imm) { | 1217 void Assembler::shll(Register reg, const Immediate& imm) { |
1218 EmitGenericShift(4, reg, imm); | 1218 EmitGenericShift(4, reg, imm); |
1219 } | 1219 } |
1220 | 1220 |
1221 | 1221 |
1222 void Assembler::shll(Register operand, Register shifter) { | 1222 void Assembler::shll(Register operand, Register shifter) { |
1223 EmitGenericShift(4, Operand(operand), shifter); | 1223 EmitGenericShift(4, Operand(operand), shifter); |
1224 } | 1224 } |
1225 | 1225 |
1226 | 1226 |
| 1227 void Assembler::shll(const Address& operand, Register shifter) { |
| 1228 EmitGenericShift(4, Operand(operand), shifter); |
| 1229 } |
| 1230 |
| 1231 |
1227 void Assembler::shrl(Register reg, const Immediate& imm) { | 1232 void Assembler::shrl(Register reg, const Immediate& imm) { |
1228 EmitGenericShift(5, reg, imm); | 1233 EmitGenericShift(5, reg, imm); |
1229 } | 1234 } |
1230 | 1235 |
1231 | 1236 |
1232 void Assembler::shrl(Register operand, Register shifter) { | 1237 void Assembler::shrl(Register operand, Register shifter) { |
1233 EmitGenericShift(5, Operand(operand), shifter); | 1238 EmitGenericShift(5, Operand(operand), shifter); |
1234 } | 1239 } |
1235 | 1240 |
1236 | 1241 |
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1250 | 1255 |
1251 | 1256 |
1252 void Assembler::shld(Register dst, Register src) { | 1257 void Assembler::shld(Register dst, Register src) { |
1253 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1258 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1254 EmitUint8(0x0F); | 1259 EmitUint8(0x0F); |
1255 EmitUint8(0xA5); | 1260 EmitUint8(0xA5); |
1256 EmitRegisterOperand(src, dst); | 1261 EmitRegisterOperand(src, dst); |
1257 } | 1262 } |
1258 | 1263 |
1259 | 1264 |
| 1265 void Assembler::shld(const Address& operand, Register src) { |
| 1266 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| 1267 EmitUint8(0x0F); |
| 1268 EmitUint8(0xA5); |
| 1269 EmitOperand(src, Operand(operand)); |
| 1270 } |
| 1271 |
1260 void Assembler::shrd(Register dst, Register src) { | 1272 void Assembler::shrd(Register dst, Register src) { |
1261 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1273 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1262 EmitUint8(0x0F); | 1274 EmitUint8(0x0F); |
1263 EmitUint8(0xAD); | 1275 EmitUint8(0xAD); |
1264 EmitRegisterOperand(src, dst); | 1276 EmitRegisterOperand(src, dst); |
1265 } | 1277 } |
1266 | 1278 |
1267 | 1279 |
1268 void Assembler::shrd(const Address& dst, Register src) { | 1280 void Assembler::shrd(const Address& dst, Register src) { |
1269 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1281 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
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2022 | 2034 |
2023 const char* Assembler::XmmRegisterName(XmmRegister reg) { | 2035 const char* Assembler::XmmRegisterName(XmmRegister reg) { |
2024 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 2036 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
2025 return xmm_reg_names[reg]; | 2037 return xmm_reg_names[reg]; |
2026 } | 2038 } |
2027 | 2039 |
2028 | 2040 |
2029 } // namespace dart | 2041 } // namespace dart |
2030 | 2042 |
2031 #endif // defined TARGET_ARCH_IA32 | 2043 #endif // defined TARGET_ARCH_IA32 |
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