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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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68 Address RelocInfo::target_address() { | 68 Address RelocInfo::target_address() { |
69 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); | 69 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); |
70 return Assembler::target_address_at(pc_); | 70 return Assembler::target_address_at(pc_); |
71 } | 71 } |
72 | 72 |
73 | 73 |
74 Address RelocInfo::target_address_address() { | 74 Address RelocInfo::target_address_address() { |
75 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY | 75 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY |
76 || rmode_ == EMBEDDED_OBJECT | 76 || rmode_ == EMBEDDED_OBJECT |
77 || rmode_ == EXTERNAL_REFERENCE); | 77 || rmode_ == EXTERNAL_REFERENCE); |
78 return reinterpret_cast<Address>(Assembler::target_address_address_at(pc_)); | 78 return reinterpret_cast<Address>(Assembler::target_pointer_address_at(pc_)); |
79 } | 79 } |
80 | 80 |
81 | 81 |
82 int RelocInfo::target_address_size() { | 82 int RelocInfo::target_address_size() { |
83 return kPointerSize; | 83 return kPointerSize; |
84 } | 84 } |
85 | 85 |
86 | 86 |
87 void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) { | 87 void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) { |
88 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); | 88 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); |
89 Assembler::set_target_address_at(pc_, target); | 89 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>( |
| 90 reinterpret_cast<intptr_t>(target) & ~3)); |
90 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { | 91 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { |
91 Object* target_code = Code::GetCodeFromTargetAddress(target); | 92 Object* target_code = Code::GetCodeFromTargetAddress(target); |
92 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 93 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
93 host(), this, HeapObject::cast(target_code)); | 94 host(), this, HeapObject::cast(target_code)); |
94 } | 95 } |
95 } | 96 } |
96 | 97 |
97 | 98 |
98 Object* RelocInfo::target_object() { | 99 Object* RelocInfo::target_object() { |
99 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); | 100 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
100 return Memory::Object_at(Assembler::target_address_address_at(pc_)); | 101 return reinterpret_cast<Object*>(Assembler::target_pointer_at(pc_)); |
101 } | 102 } |
102 | 103 |
103 | 104 |
104 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { | 105 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { |
105 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); | 106 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
106 return Memory::Object_Handle_at(Assembler::target_address_address_at(pc_)); | 107 return Handle<Object>(reinterpret_cast<Object**>( |
| 108 Assembler::target_pointer_at(pc_))); |
107 } | 109 } |
108 | 110 |
109 | 111 |
110 Object** RelocInfo::target_object_address() { | 112 Object** RelocInfo::target_object_address() { |
| 113 // Provide a "natural pointer" to the embedded object, |
| 114 // which can be de-referenced during heap iteration. |
111 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); | 115 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
112 return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_)); | 116 reconstructed_obj_ptr_ = |
| 117 reinterpret_cast<Object*>(Assembler::target_pointer_at(pc_)); |
| 118 return &reconstructed_obj_ptr_; |
113 } | 119 } |
114 | 120 |
115 | 121 |
116 void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) { | 122 void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) { |
117 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); | 123 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
118 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target)); | 124 Assembler::set_target_pointer_at(pc_, reinterpret_cast<Address>(target)); |
119 if (mode == UPDATE_WRITE_BARRIER && | 125 if (mode == UPDATE_WRITE_BARRIER && |
120 host() != NULL && | 126 host() != NULL && |
121 target->IsHeapObject()) { | 127 target->IsHeapObject()) { |
122 host()->GetHeap()->incremental_marking()->RecordWrite( | 128 host()->GetHeap()->incremental_marking()->RecordWrite( |
123 host(), &Memory::Object_at(pc_), HeapObject::cast(target)); | 129 host(), &Memory::Object_at(pc_), HeapObject::cast(target)); |
124 } | 130 } |
125 } | 131 } |
126 | 132 |
127 | 133 |
128 Address* RelocInfo::target_reference_address() { | 134 Address* RelocInfo::target_reference_address() { |
129 ASSERT(rmode_ == EXTERNAL_REFERENCE); | 135 ASSERT(rmode_ == EXTERNAL_REFERENCE); |
130 return reinterpret_cast<Address*>(Assembler::target_address_address_at(pc_)); | 136 reconstructed_adr_ptr_ = Assembler::target_address_at(pc_); |
| 137 return &reconstructed_adr_ptr_; |
131 } | 138 } |
132 | 139 |
133 | 140 |
134 Handle<JSGlobalPropertyCell> RelocInfo::target_cell_handle() { | 141 Handle<JSGlobalPropertyCell> RelocInfo::target_cell_handle() { |
135 ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL); | 142 ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL); |
136 Address address = Memory::Address_at(pc_); | 143 Address address = Memory::Address_at(pc_); |
137 return Handle<JSGlobalPropertyCell>( | 144 return Handle<JSGlobalPropertyCell>( |
138 reinterpret_cast<JSGlobalPropertyCell**>(address)); | 145 reinterpret_cast<JSGlobalPropertyCell**>(address)); |
139 } | 146 } |
140 | 147 |
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319 } | 326 } |
320 | 327 |
321 | 328 |
322 void Assembler::emit(Instr x) { | 329 void Assembler::emit(Instr x) { |
323 CheckBuffer(); | 330 CheckBuffer(); |
324 *reinterpret_cast<Instr*>(pc_) = x; | 331 *reinterpret_cast<Instr*>(pc_) = x; |
325 pc_ += kInstrSize; | 332 pc_ += kInstrSize; |
326 } | 333 } |
327 | 334 |
328 | 335 |
329 Address Assembler::target_address_address_at(Address pc) { | 336 Address Assembler::target_pointer_address_at(Address pc) { |
330 Address target_pc = pc; | 337 Address target_pc = pc; |
331 Instr instr = Memory::int32_at(target_pc); | 338 Instr instr = Memory::int32_at(target_pc); |
332 // If we have a bx instruction, the instruction before the bx is | 339 // If we have a bx instruction, the instruction before the bx is |
333 // what we need to patch. | 340 // what we need to patch. |
334 static const int32_t kBxInstMask = 0x0ffffff0; | 341 static const int32_t kBxInstMask = 0x0ffffff0; |
335 static const int32_t kBxInstPattern = 0x012fff10; | 342 static const int32_t kBxInstPattern = 0x012fff10; |
336 if ((instr & kBxInstMask) == kBxInstPattern) { | 343 if ((instr & kBxInstMask) == kBxInstPattern) { |
337 target_pc -= kInstrSize; | 344 target_pc -= kInstrSize; |
338 instr = Memory::int32_at(target_pc); | 345 instr = Memory::int32_at(target_pc); |
339 } | 346 } |
340 | 347 |
341 #ifdef USE_BLX | 348 #ifdef USE_BLX |
342 // If we have a blx instruction, the instruction before it is | 349 // If we have a blx instruction, the instruction before it is |
343 // what needs to be patched. | 350 // what needs to be patched. |
344 if ((instr & kBlxRegMask) == kBlxRegPattern) { | 351 if ((instr & kBlxRegMask) == kBlxRegPattern) { |
345 target_pc -= kInstrSize; | 352 target_pc -= kInstrSize; |
346 instr = Memory::int32_at(target_pc); | 353 instr = Memory::int32_at(target_pc); |
347 } | 354 } |
348 #endif | 355 #endif |
349 | 356 |
350 ASSERT(IsLdrPcImmediateOffset(instr)); | 357 ASSERT(IsLdrPcImmediateOffset(instr)); |
351 int offset = instr & 0xfff; // offset_12 is unsigned | 358 int offset = instr & 0xfff; // offset_12 is unsigned |
352 if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign | 359 if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign |
353 // Verify that the constant pool comes after the instruction referencing it. | 360 // Verify that the constant pool comes after the instruction referencing it. |
354 ASSERT(offset >= -4); | 361 ASSERT(offset >= -4); |
355 return target_pc + offset + 8; | 362 return target_pc + offset + 8; |
356 } | 363 } |
357 | 364 |
358 | 365 |
359 Address Assembler::target_address_at(Address pc) { | 366 Address Assembler::target_pointer_at(Address pc) { |
360 return Memory::Address_at(target_address_address_at(pc)); | 367 if (IsMovW(Memory::int32_at(pc))) { |
| 368 ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| 369 Instruction* instr = Instruction::At(pc); |
| 370 Instruction* next_instr = Instruction::At(pc + kInstrSize); |
| 371 return reinterpret_cast<Address>( |
| 372 (next_instr->ImmedMovwMovtValue() << 16) | |
| 373 instr->ImmedMovwMovtValue()); |
| 374 } |
| 375 return Memory::Address_at(target_pointer_address_at(pc)); |
361 } | 376 } |
362 | 377 |
363 | 378 |
| 379 Address Assembler::target_address_from_return_address(Address pc) { |
| 380 // Returns the address of the call target from the return address that will |
| 381 // be returned to after a call. |
| 382 #ifdef USE_BLX |
| 383 // Call sequence on V7 or later is : |
| 384 // movw ip, #... @ call address low 16 |
| 385 // movt ip, #... @ call address high 16 |
| 386 // blx ip |
| 387 // @ return address |
| 388 // Or pre-V7 or cases that need frequent patching: |
| 389 // ldr ip, [pc, #...] @ call address |
| 390 // blx ip |
| 391 // @ return address |
| 392 Address candidate = pc - 2 * Assembler::kInstrSize; |
| 393 Instr candidate_instr(Memory::int32_at(candidate)); |
| 394 if (IsLdrPcImmediateOffset(candidate_instr)) { |
| 395 return candidate; |
| 396 } |
| 397 candidate = pc - 3 * Assembler::kInstrSize; |
| 398 ASSERT(IsMovW(Memory::int32_at(candidate)) && |
| 399 IsMovT(Memory::int32_at(candidate + kInstrSize))); |
| 400 return candidate; |
| 401 #else |
| 402 // Call sequence is: |
| 403 // mov lr, pc |
| 404 // ldr pc, [pc, #...] @ call address |
| 405 // @ return address |
| 406 return pc - kInstrSize; |
| 407 #endif |
| 408 } |
| 409 |
| 410 |
| 411 Address Assembler::return_address_from_call_start(Address pc) { |
| 412 #ifdef USE_BLX |
| 413 if (IsLdrPcImmediateOffset(Memory::int32_at(pc))) { |
| 414 return pc + kInstrSize * 2; |
| 415 } else { |
| 416 ASSERT(IsMovW(Memory::int32_at(pc))); |
| 417 ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| 418 return pc + kInstrSize * 3; |
| 419 } |
| 420 #else |
| 421 return pc + kInstrSize; |
| 422 #endif |
| 423 } |
| 424 |
| 425 |
364 void Assembler::deserialization_set_special_target_at( | 426 void Assembler::deserialization_set_special_target_at( |
365 Address constant_pool_entry, Address target) { | 427 Address constant_pool_entry, Address target) { |
366 Memory::Address_at(constant_pool_entry) = target; | 428 Memory::Address_at(constant_pool_entry) = target; |
367 } | 429 } |
368 | 430 |
369 | 431 |
370 void Assembler::set_external_target_at(Address constant_pool_entry, | 432 void Assembler::set_external_target_at(Address constant_pool_entry, |
371 Address target) { | 433 Address target) { |
372 Memory::Address_at(constant_pool_entry) = target; | 434 Memory::Address_at(constant_pool_entry) = target; |
373 } | 435 } |
374 | 436 |
375 | 437 |
| 438 static Instr EncodeMovwImmediate(uint32_t immediate) { |
| 439 ASSERT(immediate < 0x10000); |
| 440 return ((immediate & 0xf000) << 4) | (immediate & 0xfff); |
| 441 } |
| 442 |
| 443 |
| 444 void Assembler::set_target_pointer_at(Address pc, Address target) { |
| 445 if (IsMovW(Memory::int32_at(pc))) { |
| 446 ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| 447 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc); |
| 448 uint32_t immediate = reinterpret_cast<uint32_t>(target); |
| 449 uint32_t intermediate = instr_ptr[0]; |
| 450 intermediate &= ~EncodeMovwImmediate(0xFFFF); |
| 451 intermediate |= EncodeMovwImmediate(immediate & 0xFFFF); |
| 452 instr_ptr[0] = intermediate; |
| 453 intermediate = instr_ptr[1]; |
| 454 intermediate &= ~EncodeMovwImmediate(0xFFFF); |
| 455 intermediate |= EncodeMovwImmediate(immediate >> 16); |
| 456 instr_ptr[1] = intermediate; |
| 457 ASSERT(IsMovW(Memory::int32_at(pc))); |
| 458 ASSERT(IsMovT(Memory::int32_at(pc + kInstrSize))); |
| 459 CPU::FlushICache(pc, 2 * kInstrSize); |
| 460 } else { |
| 461 ASSERT(IsLdrPcImmediateOffset(Memory::int32_at(pc))); |
| 462 Memory::Address_at(target_pointer_address_at(pc)) = target; |
| 463 // Intuitively, we would think it is necessary to always flush the |
| 464 // instruction cache after patching a target address in the code as follows: |
| 465 // CPU::FlushICache(pc, sizeof(target)); |
| 466 // However, on ARM, no instruction is actually patched in the case |
| 467 // of embedded constants of the form: |
| 468 // ldr ip, [pc, #...] |
| 469 // since the instruction accessing this address in the constant pool remains |
| 470 // unchanged. |
| 471 } |
| 472 } |
| 473 |
| 474 |
| 475 Address Assembler::target_address_at(Address pc) { |
| 476 return reinterpret_cast<Address>( |
| 477 reinterpret_cast<intptr_t>(target_pointer_at(pc)) & ~3); |
| 478 } |
| 479 |
| 480 |
376 void Assembler::set_target_address_at(Address pc, Address target) { | 481 void Assembler::set_target_address_at(Address pc, Address target) { |
377 Memory::Address_at(target_address_address_at(pc)) = target; | 482 set_target_pointer_at(pc, reinterpret_cast<Address>( |
378 // Intuitively, we would think it is necessary to flush the instruction cache | 483 reinterpret_cast<intptr_t>(target) & ~3)); |
379 // after patching a target address in the code as follows: | |
380 // CPU::FlushICache(pc, sizeof(target)); | |
381 // However, on ARM, no instruction was actually patched by the assignment | |
382 // above; the target address is not part of an instruction, it is patched in | |
383 // the constant pool and is read via a data access; the instruction accessing | |
384 // this address in the constant pool remains unchanged. | |
385 } | 484 } |
386 | 485 |
| 486 |
387 } } // namespace v8::internal | 487 } } // namespace v8::internal |
388 | 488 |
389 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 489 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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