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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2098 void Assembler::movmskpd(Register dst, XMMRegister src) { | 2098 void Assembler::movmskpd(Register dst, XMMRegister src) { |
2099 ASSERT(CpuFeatures::IsEnabled(SSE2)); | 2099 ASSERT(CpuFeatures::IsEnabled(SSE2)); |
2100 EnsureSpace ensure_space(this); | 2100 EnsureSpace ensure_space(this); |
2101 EMIT(0x66); | 2101 EMIT(0x66); |
2102 EMIT(0x0F); | 2102 EMIT(0x0F); |
2103 EMIT(0x50); | 2103 EMIT(0x50); |
2104 emit_sse_operand(dst, src); | 2104 emit_sse_operand(dst, src); |
2105 } | 2105 } |
2106 | 2106 |
2107 | 2107 |
2108 void Assembler::pcmpeqd(XMMRegister dst, XMMRegister src) { | |
2109 ASSERT(CpuFeatures::IsEnabled(SSE2)); | |
2110 EnsureSpace ensure_space(this); | |
2111 EMIT(0x66); | |
2112 EMIT(0x0F); | |
2113 EMIT(0x76); | |
2114 emit_sse_operand(dst, src); | |
2115 } | |
2116 | |
2117 | |
2118 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { | 2108 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { |
2119 ASSERT(CpuFeatures::IsEnabled(SSE2)); | 2109 ASSERT(CpuFeatures::IsEnabled(SSE2)); |
2120 EnsureSpace ensure_space(this); | 2110 EnsureSpace ensure_space(this); |
2121 EMIT(0xF2); | 2111 EMIT(0xF2); |
2122 EMIT(0x0F); | 2112 EMIT(0x0F); |
2123 EMIT(0xC2); | 2113 EMIT(0xC2); |
2124 emit_sse_operand(dst, src); | 2114 emit_sse_operand(dst, src); |
2125 EMIT(1); // LT == 1 | 2115 EMIT(1); // LT == 1 |
2126 } | 2116 } |
2127 | 2117 |
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2646 fprintf(coverage_log, "%s\n", file_line); | 2636 fprintf(coverage_log, "%s\n", file_line); |
2647 fflush(coverage_log); | 2637 fflush(coverage_log); |
2648 } | 2638 } |
2649 } | 2639 } |
2650 | 2640 |
2651 #endif | 2641 #endif |
2652 | 2642 |
2653 } } // namespace v8::internal | 2643 } } // namespace v8::internal |
2654 | 2644 |
2655 #endif // V8_TARGET_ARCH_IA32 | 2645 #endif // V8_TARGET_ARCH_IA32 |
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