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Issue 11027060: Faster 64-bit right-shift for the ia32 compiler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: addressed comments Created 8 years, 2 months ago
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1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32.
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "lib/error.h" 10 #include "lib/error.h"
(...skipping 2355 matching lines...) Expand 10 before | Expand all | Expand 10 after
2366 case Token::kSUB: { 2366 case Token::kSUB: {
2367 Label* deopt = compiler->AddDeoptStub(deopt_id(), 2367 Label* deopt = compiler->AddDeoptStub(deopt_id(),
2368 kDeoptBinaryMintOp); 2368 kDeoptBinaryMintOp);
2369 Label done, overflow; 2369 Label done, overflow;
2370 __ pextrd(EAX, right, Immediate(0)); // Lower half left 2370 __ pextrd(EAX, right, Immediate(0)); // Lower half left
2371 __ pextrd(EDX, right, Immediate(1)); // Upper half left 2371 __ pextrd(EDX, right, Immediate(1)); // Upper half left
2372 __ subl(ESP, Immediate(2 * kWordSize)); 2372 __ subl(ESP, Immediate(2 * kWordSize));
2373 __ movq(Address(ESP, 0), left); 2373 __ movq(Address(ESP, 0), left);
2374 if (op_kind() == Token::kADD) { 2374 if (op_kind() == Token::kADD) {
2375 __ addl(Address(ESP, 0), EAX); 2375 __ addl(Address(ESP, 0), EAX);
2376 __ adcl(Address(ESP, 4), EDX); 2376 __ adcl(Address(ESP, 1 * kWordSize), EDX);
2377 } else { 2377 } else {
2378 __ subl(Address(ESP, 0), EAX); 2378 __ subl(Address(ESP, 0), EAX);
2379 __ sbbl(Address(ESP, 4), EDX); 2379 __ sbbl(Address(ESP, 1 * kWordSize), EDX);
2380 } 2380 }
2381 __ j(OVERFLOW, &overflow); 2381 __ j(OVERFLOW, &overflow);
2382 __ movq(left, Address(ESP, 0)); 2382 __ movq(left, Address(ESP, 0));
2383 __ addl(ESP, Immediate(2 * kWordSize)); 2383 __ addl(ESP, Immediate(2 * kWordSize));
2384 __ jmp(&done); 2384 __ jmp(&done);
2385 __ Bind(&overflow); 2385 __ Bind(&overflow);
2386 __ addl(ESP, Immediate(2 * kWordSize)); 2386 __ addl(ESP, Immediate(2 * kWordSize));
2387 __ jmp(deopt); 2387 __ jmp(deopt);
2388 __ Bind(&done); 2388 __ Bind(&done);
2389 break; 2389 break;
2390 } 2390 }
2391 default: UNREACHABLE(); 2391 default: UNREACHABLE();
2392 } 2392 }
2393 } 2393 }
2394 2394
2395 2395
2396 LocationSummary* ShiftMintOpInstr::MakeLocationSummary() const {
2397 const intptr_t kNumInputs = 2;
2398 const intptr_t kNumTemps = 1;
2399 LocationSummary* summary =
2400 new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
2401 summary->set_in(0, Location::RequiresXmmRegister());
2402 summary->set_in(1, Location::RegisterLocation(ECX));
2403 summary->set_temp(0, Location::RequiresRegister());
2404 summary->set_out(Location::SameAsFirstInput());
2405 return summary;
2406 }
2407
2408
2409 void ShiftMintOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
2410 XmmRegister left = locs()->in(0).xmm_reg();
2411 Register temp = locs()->temp(0).reg();
2412 ASSERT(locs()->in(1).reg() == ECX);
2413 ASSERT(locs()->out().xmm_reg() == left);
2414
2415 switch (op_kind()) {
2416 case Token::kSHR: {
2417 Label* deopt = compiler->AddDeoptStub(deopt_id(),
2418 kDeoptShiftMintOp);
2419 __ subl(ESP, Immediate(2 * kWordSize));
2420 __ movq(Address(ESP, 0), left);
2421 // Deoptimize if shift count is > 31.
2422 // sarl operation masks the count to 5 bits and
2423 // shrd is undefined with count > operand size (32)
2424 // TODO(fschneider): Support shift counts > 31 without deoptimization.
2425 __ SmiUntag(ECX);
2426 const Immediate kCountLimit = Immediate(31);
2427 __ cmpl(ECX, kCountLimit);
2428 __ j(ABOVE, deopt);
2429 __ movl(temp, Address(ESP, 1 * kWordSize));
2430 __ shrd(Address(ESP, 0), temp); // Shift count in CL.
2431 __ sarl(Address(ESP, 1 * kWordSize), ECX); // Shift count in CL.
2432 __ movq(left, Address(ESP, 0));
2433 __ addl(ESP, Immediate(2 * kWordSize));
2434 break;
2435 }
2436 case Token::kSHL:
2437 UNIMPLEMENTED();
2438 break;
2439 default:
2440 UNREACHABLE();
2441 break;
2442 }
2443 }
2444
2445
2396 LocationSummary* UnaryMintOpInstr::MakeLocationSummary() const { 2446 LocationSummary* UnaryMintOpInstr::MakeLocationSummary() const {
2397 const intptr_t kNumInputs = 1; 2447 const intptr_t kNumInputs = 1;
2398 const intptr_t kNumTemps = 0; 2448 const intptr_t kNumTemps = 0;
2399 LocationSummary* summary = 2449 LocationSummary* summary =
2400 new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall); 2450 new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
2401 summary->set_in(0, Location::RequiresXmmRegister()); 2451 summary->set_in(0, Location::RequiresXmmRegister());
2402 summary->set_out(Location::SameAsFirstInput()); 2452 summary->set_out(Location::SameAsFirstInput());
2403 return summary; 2453 return summary;
2404 } 2454 }
2405 2455
2406 2456
2407 void UnaryMintOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 2457 void UnaryMintOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
2408 ASSERT(op_kind() == Token::kBIT_NOT); 2458 ASSERT(op_kind() == Token::kBIT_NOT);
2409 XmmRegister value = locs()->in(0).xmm_reg(); 2459 XmmRegister value = locs()->in(0).xmm_reg();
2410 ASSERT(value == locs()->out().xmm_reg()); 2460 ASSERT(value == locs()->out().xmm_reg());
2411 __ pcmpeqq(XMM0, XMM0); // Generate all 1's. 2461 __ pcmpeqq(XMM0, XMM0); // Generate all 1's.
2412 __ pxor(value, XMM0); 2462 __ pxor(value, XMM0);
2413 } 2463 }
2414 2464
2415 2465
2416 } // namespace dart 2466 } // namespace dart
2417 2467
2418 #undef __ 2468 #undef __
2419 2469
2420 #endif // defined TARGET_ARCH_X64 2470 #endif // defined TARGET_ARCH_X64
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