Add fast 64-bit integer ADD and SUB to the optimizing compiler.

runtime/vm/assembler_ia32_test.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 1482 matching lines @@
   int64_t res = reinterpret_cast<LongAddRegCode>(entry)(a, b);
   EXPECT_EQ((a + b), res);
   a = 2147483647;
   b = 600000;
   res = reinterpret_cast<LongAddRegCode>(entry)(a, b);
   EXPECT_EQ((a + b), res);
 }
 
 
 ASSEMBLER_TEST_GENERATE(LongAddAddress, assembler) {
-  // Preserve clobbered callee-saved register (EBX).
   __ movl(EAX, Address(ESP, 1 * kWordSize));  // left low.
   __ movl(EDX, Address(ESP, 2 * kWordSize));  // left high.
   __ addl(EAX, Address(ESP, 3 * kWordSize));  // low.
   __ adcl(EDX, Address(ESP, 4 * kWordSize));  // high.
   // Result is in EAX/EDX.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LongAddAddress, entry) {
@@ skipping 31 matching lines @@
   int64_t res = reinterpret_cast<LongSubRegCode>(entry)(a, b);
   EXPECT_EQ((a - b), res);
   a = 600000;
   b = 2147483647;
   res = reinterpret_cast<LongSubRegCode>(entry)(a, b);
   EXPECT_EQ((a - b), res);
 }
 
 
 ASSEMBLER_TEST_GENERATE(LongSubAddress, assembler) {
-  // Preserve clobbered callee-saved register (EBX).
   __ movl(EAX, Address(ESP, 1 * kWordSize));  // left low.
   __ movl(EDX, Address(ESP, 2 * kWordSize));  // left high.
   __ subl(EAX, Address(ESP, 3 * kWordSize));  // low.
   __ sbbl(EDX, Address(ESP, 4 * kWordSize));  // high.
   // Result is in EAX/EDX.
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LongSubAddress, entry) {
   typedef int64_t (*LongSubAddressCode)(int64_t a, int64_t b);
   int64_t a = 12;
   int64_t b = 14;
   int64_t res = reinterpret_cast<LongSubAddressCode>(entry)(a, b);
   EXPECT_EQ((a - b), res);
   a = 600000;
   b = 2147483647;
   res = reinterpret_cast<LongSubAddressCode>(entry)(a, b);
   EXPECT_EQ((a - b), res);
 }
 
 
+ASSEMBLER_TEST_GENERATE(LongSubAddress2, assembler) {
+  // Preserve clobbered callee-saved register (EBX).
+  __ pushl(EBX);
+  __ movl(EAX, Address(ESP, 2 * kWordSize));  // left low.
+  __ movl(EDX, Address(ESP, 3 * kWordSize));  // left high.
+  __ movl(ECX, Address(ESP, 4 * kWordSize));  // right low.
+  __ movl(EBX, Address(ESP, 5 * kWordSize));  // right high
+  __ subl(ESP, Immediate(2 * kWordSize));
+  __ movl(Address(ESP, 0 * kWordSize), EAX);  // left low.
+  __ movl(Address(ESP, 1 * kWordSize), EDX);  // left high.
+  __ subl(Address(ESP, 0 * kWordSize), ECX);
+  __ sbbl(Address(ESP, 1 * kWordSize), EBX);
+  __ movl(EAX, Address(ESP, 0 * kWordSize));
+  __ movl(EDX, Address(ESP, 1 * kWordSize));
+  __ addl(ESP, Immediate(2 * kWordSize));
+  __ popl(EBX);
+  // Result is in EAX/EDX.
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(LongSubAddress2, entry) {
+  typedef int64_t (*LongSubAddress2Code)(int64_t a, int64_t b);
+  int64_t a = 12;
+  int64_t b = 14;
+  int64_t res = reinterpret_cast<LongSubAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a - b), res);
+  a = 600000;
+  b = 2147483647;
+  res = reinterpret_cast<LongSubAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a - b), res);
+}
+
+
+ASSEMBLER_TEST_GENERATE(LongAddAddress2, assembler) {
+  // Preserve clobbered callee-saved register (EBX).
+  __ pushl(EBX);
+  __ movl(EAX, Address(ESP, 2 * kWordSize));  // left low.
+  __ movl(EDX, Address(ESP, 3 * kWordSize));  // left high.
+  __ movl(ECX, Address(ESP, 4 * kWordSize));  // right low.
+  __ movl(EBX, Address(ESP, 5 * kWordSize));  // right high
+  __ subl(ESP, Immediate(2 * kWordSize));
+  __ movl(Address(ESP, 0 * kWordSize), EAX);  // left low.
+  __ movl(Address(ESP, 1 * kWordSize), EDX);  // left high.
+  __ addl(Address(ESP, 0 * kWordSize), ECX);
+  __ adcl(Address(ESP, 1 * kWordSize), EBX);
+  __ movl(EAX, Address(ESP, 0 * kWordSize));
+  __ movl(EDX, Address(ESP, 1 * kWordSize));
+  __ addl(ESP, Immediate(2 * kWordSize));
+  __ popl(EBX);
+  // Result is in EAX/EDX.
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(LongAddAddress2, entry) {
+  typedef int64_t (*LongAddAddress2Code)(int64_t a, int64_t b);
+  int64_t a = 12;
+  int64_t b = 14;
+  int64_t res = reinterpret_cast<LongAddAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a + b), res);
+  a = 600000;
+  b = 2147483647;
+  res = reinterpret_cast<LongAddAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a + b), res);
+}
+
+
 // Testing only the lower 64-bit value of 'cvtdq2pd'.
 ASSEMBLER_TEST_GENERATE(IntegerToDoubleConversion, assembler) {
   __ movsd(XMM1, Address(ESP, kWordSize));
   __ cvtdq2pd(XMM2, XMM1);
   __ pushl(EAX);
   __ pushl(EAX);
   __ movsd(Address(ESP, 0), XMM2);
   __ fldl(Address(ESP, 0));
   __ popl(EAX);
   __ popl(EAX);
@@ skipping 86 matching lines @@
   typedef double (*OrpdCode)(double d);
   double res = reinterpret_cast<OrpdCode>(entry)(12.56e3);
   EXPECT_FLOAT_EQ(-12.56e3, res, 0.0);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Pextrd0, assembler) {
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pextrd(EAX, XMM0, Immediate(0));
-    __ ret();
   }
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Pextrd0, entry) {
   if (CPUFeatures::sse4_1_supported()) {
     typedef int32_t (*PextrdCode0)(double d);
     int32_t res = reinterpret_cast<PextrdCode0>(entry)(123456789);
     EXPECT_EQ(0x54000000, res);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Pextrd1, assembler) {
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pextrd(EAX, XMM0, Immediate(1));
-    __ ret();
   }
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Pextrd1, entry) {
   if (CPUFeatures::sse4_1_supported()) {
     typedef int32_t (*PextrdCode1)(double d);
     int32_t res = reinterpret_cast<PextrdCode1>(entry)(123456789);
     EXPECT_EQ(0x419d6f34, res);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Pmovsxdq, assembler) {
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pmovsxdq(XMM0, XMM0);
     __ pextrd(EAX, XMM0, Immediate(1));
-    __ ret();
   }
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Pmovsxdq, entry) {
   if (CPUFeatures::sse4_1_supported()) {
     typedef int32_t (*PmovsxdqCode)(double d);
     int32_t res = reinterpret_cast<PmovsxdqCode>(entry)(123456789);
     EXPECT_EQ(0, res);
   }
 }
 
 
 ASSEMBLER_TEST_GENERATE(Pcmpeqq, assembler) {
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ xorpd(XMM1, XMM1);
     __ pcmpeqq(XMM0, XMM1);
     __ movd(EAX, XMM0);
-    __ ret();
   }
+  __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Pcmpeqq, entry) {
   if (CPUFeatures::sse4_1_supported()) {
     typedef int32_t (*PcmpeqqCode)(double d);
     int32_t res = reinterpret_cast<PcmpeqqCode>(entry)(0);
     EXPECT_EQ(-1, res);
   }
 }
@@ skipping 12 matching lines @@
 }
 
 
 ASSEMBLER_TEST_RUN(AndPd, entry) {
   typedef double (*AndpdCode)(double d);
   double res = reinterpret_cast<AndpdCode>(entry)(12.56e3);
   EXPECT_FLOAT_EQ(12.56e3, res, 0.0);
 }
 
 
+ASSEMBLER_TEST_GENERATE(Movq, assembler) {
+  __ movq(XMM0, Address(ESP, kWordSize));
+  __ subl(ESP, Immediate(kDoubleSize));
+  __ movq(Address(ESP, 0), XMM0);
+  __ fldl(Address(ESP, 0));
+  __ addl(ESP, Immediate(kDoubleSize));
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(Movq, entry) {
+  typedef double (*MovqCode)(double d);
+  double res = reinterpret_cast<MovqCode>(entry)(12.34e5);
+  EXPECT_FLOAT_EQ(12.34e5, res, 0.0);
+}
+
+
 ASSEMBLER_TEST_GENERATE(DoubleAbs, assembler) {
   __ movsd(XMM0, Address(ESP, kWordSize));
   __ DoubleAbs(XMM0);
   __ pushl(EAX);
   __ pushl(EAX);
   __ movsd(Address(ESP, 0), XMM0);
   __ fldl(Address(ESP, 0));
   __ popl(EAX);
   __ popl(EAX);
   __ ret();
@@ skipping 195 matching lines @@
                      EAX);
   __ popl(EAX);
   __ popl(CTX);
   __ ret();
 }
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_IA32