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Side by Side Diff: runtime/vm/assembler_ia32.cc

Issue 11016028: Add fast 64-bit integer ADD and SUB to the optimizing compiler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 8 years, 2 months ago
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1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/heap.h" 9 #include "vm/heap.h"
10 #include "vm/memory_region.h" 10 #include "vm/memory_region.h"
(...skipping 347 matching lines...) Expand 10 before | Expand all | Expand 10 after
358 358
359 void Assembler::movd(Register dst, XmmRegister src) { 359 void Assembler::movd(Register dst, XmmRegister src) {
360 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 360 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
361 EmitUint8(0x66); 361 EmitUint8(0x66);
362 EmitUint8(0x0F); 362 EmitUint8(0x0F);
363 EmitUint8(0x7E); 363 EmitUint8(0x7E);
364 EmitOperand(src, Operand(dst)); 364 EmitOperand(src, Operand(dst));
365 } 365 }
366 366
367 367
368 void Assembler::movq(const Address& dst, XmmRegister src) {
369 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
370 EmitUint8(0x66);
371 EmitUint8(0x0F);
372 EmitUint8(0xD6);
373 EmitOperand(src, Operand(dst));
374 }
375
376
377 void Assembler::movq(XmmRegister dst, const Address& src) {
378 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
379 EmitUint8(0xF3);
380 EmitUint8(0x0F);
381 EmitUint8(0x7E);
382 EmitOperand(dst, Operand(src));
383 }
384
385
368 void Assembler::addss(XmmRegister dst, XmmRegister src) { 386 void Assembler::addss(XmmRegister dst, XmmRegister src) {
369 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 387 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
370 EmitUint8(0xF3); 388 EmitUint8(0xF3);
371 EmitUint8(0x0F); 389 EmitUint8(0x0F);
372 EmitUint8(0x58); 390 EmitUint8(0x58);
373 EmitXmmRegisterOperand(dst, src); 391 EmitXmmRegisterOperand(dst, src);
374 } 392 }
375 393
376 394
377 void Assembler::addss(XmmRegister dst, const Address& src) { 395 void Assembler::addss(XmmRegister dst, const Address& src) {
(...skipping 650 matching lines...) Expand 10 before | Expand all | Expand 10 after
1028 } 1046 }
1029 1047
1030 1048
1031 void Assembler::adcl(Register dst, const Address& address) { 1049 void Assembler::adcl(Register dst, const Address& address) {
1032 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1050 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1033 EmitUint8(0x13); 1051 EmitUint8(0x13);
1034 EmitOperand(dst, address); 1052 EmitOperand(dst, address);
1035 } 1053 }
1036 1054
1037 1055
1056 void Assembler::adcl(const Address& address, Register reg) {
1057 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1058 EmitUint8(0x11);
1059 EmitOperand(reg, address);
1060 }
1061
1062
1038 void Assembler::subl(Register dst, Register src) { 1063 void Assembler::subl(Register dst, Register src) {
1039 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1064 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1040 EmitUint8(0x2B); 1065 EmitUint8(0x2B);
1041 EmitOperand(dst, Operand(src)); 1066 EmitOperand(dst, Operand(src));
1042 } 1067 }
1043 1068
1044 1069
1045 void Assembler::subl(Register reg, const Immediate& imm) { 1070 void Assembler::subl(Register reg, const Immediate& imm) {
1046 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1071 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1047 EmitComplex(5, Operand(reg), imm); 1072 EmitComplex(5, Operand(reg), imm);
1048 } 1073 }
1049 1074
1050 1075
1051 void Assembler::subl(Register reg, const Address& address) { 1076 void Assembler::subl(Register reg, const Address& address) {
1052 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1077 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1053 EmitUint8(0x2B); 1078 EmitUint8(0x2B);
1054 EmitOperand(reg, address); 1079 EmitOperand(reg, address);
1055 } 1080 }
1056 1081
1057 1082
1083 void Assembler::subl(const Address& address, Register reg) {
1084 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1085 EmitUint8(0x29);
1086 EmitOperand(reg, address);
1087 }
1088
1089
1058 void Assembler::cdq() { 1090 void Assembler::cdq() {
1059 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1091 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1060 EmitUint8(0x99); 1092 EmitUint8(0x99);
1061 } 1093 }
1062 1094
1063 1095
1064 void Assembler::idivl(Register reg) { 1096 void Assembler::idivl(Register reg) {
1065 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1097 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1066 EmitUint8(0xF7); 1098 EmitUint8(0xF7);
1067 EmitUint8(0xF8 | reg); 1099 EmitUint8(0xF8 | reg);
(...skipping 65 matching lines...) Expand 10 before | Expand all | Expand 10 after
1133 } 1165 }
1134 1166
1135 1167
1136 void Assembler::sbbl(Register dst, const Address& address) { 1168 void Assembler::sbbl(Register dst, const Address& address) {
1137 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1169 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1138 EmitUint8(0x1B); 1170 EmitUint8(0x1B);
1139 EmitOperand(dst, address); 1171 EmitOperand(dst, address);
1140 } 1172 }
1141 1173
1142 1174
1175 void Assembler::sbbl(const Address& address, Register dst) {
1176 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1177 EmitUint8(0x19);
1178 EmitOperand(dst, address);
1179 }
1180
1181
1143 void Assembler::incl(Register reg) { 1182 void Assembler::incl(Register reg) {
1144 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1183 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1145 EmitUint8(0x40 + reg); 1184 EmitUint8(0x40 + reg);
1146 } 1185 }
1147 1186
1148 1187
1149 void Assembler::incl(const Address& address) { 1188 void Assembler::incl(const Address& address) {
1150 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1189 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1151 EmitUint8(0xFF); 1190 EmitUint8(0xFF);
1152 EmitOperand(0, address); 1191 EmitOperand(0, address);
(...skipping 800 matching lines...) Expand 10 before | Expand all | Expand 10 after
1953 1992
1954 const char* Assembler::XmmRegisterName(XmmRegister reg) { 1993 const char* Assembler::XmmRegisterName(XmmRegister reg) {
1955 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 1994 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
1956 return xmm_reg_names[reg]; 1995 return xmm_reg_names[reg];
1957 } 1996 }
1958 1997
1959 1998
1960 } // namespace dart 1999 } // namespace dart
1961 2000
1962 #endif // defined TARGET_ARCH_IA32 2001 #endif // defined TARGET_ARCH_IA32
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