| Index: src/trusted/validator_ragel/gen/validator_x86_64.c
|
| ===================================================================
|
| --- src/trusted/validator_ragel/gen/validator_x86_64.c (revision 9911)
|
| +++ src/trusted/validator_ragel/gen/validator_x86_64.c (working copy)
|
| @@ -3,6 +3,14 @@
|
| * Compiled for x86-64 mode.
|
| */
|
|
|
| +/*
|
| + * This is the core of amd64-mode validator. Please note that this file
|
| + * combines ragel machine description and C language actions. Please read
|
| + * validator_internals.html first to understand how the whole thing is built:
|
| + * it explains how the byte sequences are constructed, what constructs like
|
| + * β@{}β or βREX_WRX?β mean, etc.
|
| + */
|
| +
|
| #include <assert.h>
|
| #include <errno.h>
|
| #include <stddef.h>
|
| @@ -10,7 +18,7 @@
|
| #include <stdlib.h>
|
| #include <string.h>
|
|
|
| -#include "native_client/src/trusted/validator_ragel/unreviewed/validator_internal.h"
|
| +#include "native_client/src/trusted/validator_ragel/validator_internal.h"
|
|
|
|
|
|
|
| @@ -27,7 +35,7 @@
|
| Bool ValidateChunkAMD64(const uint8_t *data, size_t size,
|
| enum validation_options options,
|
| const NaClCPUFeaturesX86 *cpu_features,
|
| - validation_callback_func user_callback,
|
| + ValidationCallbackFunc user_callback,
|
| void *callback_data) {
|
| bitmap_word valid_targets_small;
|
| bitmap_word jump_dests_small;
|
| @@ -74,9 +82,9 @@
|
| * 2 bits for register kinds,
|
| * 5 bits for register numbers (16 regs plus RIZ). */
|
| uint32_t operand_states = 0;
|
| - enum register_name base = NO_REG;
|
| - enum register_name index = NO_REG;
|
| - enum register_name restricted_register = NO_REG;
|
| + enum OperandName base = NO_REG;
|
| + enum OperandName index = NO_REG;
|
| + enum OperandName restricted_register = NO_REG;
|
| uint8_t rex_prefix = FALSE;
|
| uint8_t vex_prefix2 = 0xe0;
|
| uint8_t vex_prefix3 = 0x00;
|
| @@ -2395,6 +2403,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2426,6 +2435,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2465,6 +2475,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2498,6 +2509,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2531,6 +2543,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2563,6 +2576,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2606,6 +2620,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2637,6 +2652,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2677,6 +2693,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2711,6 +2728,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2745,6 +2763,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2789,6 +2808,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2821,6 +2841,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2862,6 +2883,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2897,6 +2919,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2932,6 +2955,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2962,6 +2986,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -2993,6 +3018,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3018,6 +3044,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3044,6 +3071,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3070,6 +3098,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3096,6 +3125,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3107,7 +3137,7 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| rex_prefix, operand_states);
|
| @@ -3128,6 +3158,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3135,7 +3166,7 @@
|
| goto st904;
|
| tr100:
|
| { SET_CPU_FEATURE(CPUFeature_MON); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RDX); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| @@ -3157,6 +3188,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3164,7 +3196,7 @@
|
| goto st904;
|
| tr101:
|
| { SET_CPU_FEATURE(CPUFeature_MON); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RCX); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| @@ -3186,6 +3218,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3212,6 +3245,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3246,6 +3280,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3281,6 +3316,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3310,6 +3346,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3339,6 +3376,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3368,6 +3406,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3397,6 +3436,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3435,6 +3475,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3461,6 +3502,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3495,6 +3537,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3528,6 +3571,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3557,6 +3601,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3586,6 +3631,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3624,6 +3670,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3662,6 +3709,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3688,6 +3736,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3714,6 +3763,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3750,6 +3800,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3787,6 +3838,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3825,6 +3877,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3855,6 +3908,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3884,6 +3938,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3913,6 +3968,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3924,7 +3980,7 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| rex_prefix, operand_states);
|
| @@ -3945,6 +4001,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3959,8 +4016,8 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(1, REG_RAX); }
|
| {
|
| process_2_operands_zero_extends(&restricted_register,
|
| @@ -3983,6 +4040,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -3994,8 +4052,8 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(1, REG_RAX); }
|
| {
|
| process_2_operands_zero_extends(&restricted_register,
|
| @@ -4018,6 +4076,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4044,6 +4103,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4075,6 +4135,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4115,6 +4176,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4152,6 +4214,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4183,6 +4246,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4214,13 +4278,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr360:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -4246,13 +4311,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr377:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -4278,13 +4344,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr378:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -4310,6 +4377,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4348,6 +4416,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4374,6 +4443,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4381,7 +4451,7 @@
|
| goto st904;
|
| tr387:
|
| { SET_CPU_FEATURE(CPUFeature_x87); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| @@ -4403,6 +4473,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4436,13 +4507,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr392:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -4469,6 +4541,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4480,8 +4553,8 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_64_BIT); }
|
| { SET_OPERAND_NAME(1, REG_RAX); }
|
| {
|
| process_2_operands(&restricted_register, &instruction_info_collected,
|
| @@ -4503,6 +4576,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4514,7 +4588,7 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| rex_prefix, operand_states);
|
| @@ -4535,6 +4609,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4573,6 +4648,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4601,6 +4677,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4626,6 +4703,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4665,6 +4743,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4701,6 +4780,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4731,6 +4811,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4761,6 +4842,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4791,13 +4873,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr493:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -4823,6 +4906,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4834,7 +4918,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RSP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -4855,6 +4939,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4866,7 +4951,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RBP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -4887,6 +4972,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4894,10 +4980,8 @@
|
| goto st904;
|
| tr511:
|
| {
|
| - instruction_start -= 7;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -4918,6 +5002,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4929,7 +5014,7 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| rex_prefix, operand_states);
|
| @@ -4950,6 +5035,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -4961,8 +5047,8 @@
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_16_BIT); }
|
| { SET_OPERAND_NAME(1, REG_RAX); }
|
| {
|
| process_2_operands(&restricted_register, &instruction_info_collected,
|
| @@ -4984,6 +5070,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5014,6 +5101,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5042,6 +5130,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5071,13 +5160,14 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| }
|
| goto st904;
|
| tr652:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -5103,6 +5193,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5110,15 +5201,10 @@
|
| goto st904;
|
| tr699:
|
| {
|
| - instruction_start -= 6;
|
| - if (RMFromModRM(instruction_start[1]) !=
|
| - RegFromModRM(instruction_start[5]) ||
|
| - RMFromModRM(instruction_start[1]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + FALSE, TRUE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -5142,6 +5228,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5149,15 +5236,10 @@
|
| goto st904;
|
| tr700:
|
| {
|
| - instruction_start -= 6;
|
| - if (RMFromModRM(instruction_start[1]) !=
|
| - RegFromModRM(instruction_start[5]) ||
|
| - RMFromModRM(instruction_start[1]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + FALSE, TRUE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -5177,6 +5259,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5184,12 +5267,10 @@
|
| goto st904;
|
| tr720:
|
| {
|
| - instruction_start -= 13;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 2);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 9);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 13);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5210,6 +5291,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5217,10 +5299,8 @@
|
| goto st904;
|
| tr729:
|
| {
|
| - instruction_start -= 6;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 2);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5241,6 +5321,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5269,6 +5350,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5276,7 +5358,7 @@
|
| goto st904;
|
| tr878:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5312,6 +5394,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5319,7 +5402,7 @@
|
| goto st904;
|
| tr881:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5343,6 +5426,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5369,6 +5453,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5376,7 +5461,7 @@
|
| goto st904;
|
| tr884:
|
| { SET_CPU_FEATURE(CPUFeature_LWP); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -5402,6 +5487,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5409,7 +5495,7 @@
|
| goto st904;
|
| tr887:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5445,6 +5531,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5452,7 +5539,7 @@
|
| goto st904;
|
| tr890:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5476,6 +5563,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5483,7 +5571,7 @@
|
| goto st904;
|
| tr892:
|
| { SET_CPU_FEATURE(CPUFeature_LWP); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -5509,6 +5597,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5538,6 +5627,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5576,6 +5666,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5602,6 +5693,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5609,7 +5701,7 @@
|
| goto st904;
|
| tr1226:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5645,6 +5737,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5652,7 +5745,7 @@
|
| goto st904;
|
| tr1229:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5676,6 +5769,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5683,7 +5777,7 @@
|
| goto st904;
|
| tr1231:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5719,6 +5813,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5726,7 +5821,7 @@
|
| goto st904;
|
| tr1234:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -5750,6 +5845,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5778,6 +5874,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5785,10 +5882,8 @@
|
| goto st904;
|
| tr1349:
|
| {
|
| - instruction_start -= 6;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 2);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5809,6 +5904,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5816,12 +5912,10 @@
|
| goto st904;
|
| tr1355:
|
| {
|
| - instruction_start -= 12;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 2);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 8);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 12);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5842,6 +5936,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5849,15 +5944,10 @@
|
| goto st904;
|
| tr1370:
|
| {
|
| - instruction_start -= 6;
|
| - if (RMFromModRM(instruction_start[1]) !=
|
| - RMFromModRM(instruction_start[5]) ||
|
| - RMFromModRM(instruction_start[1]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + FALSE, FALSE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -5881,6 +5971,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5888,15 +5979,10 @@
|
| goto st904;
|
| tr1371:
|
| {
|
| - instruction_start -= 6;
|
| - if (RMFromModRM(instruction_start[1]) !=
|
| - RMFromModRM(instruction_start[5]) ||
|
| - RMFromModRM(instruction_start[1]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 6);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + FALSE, FALSE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -5916,6 +6002,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5923,12 +6010,10 @@
|
| goto st904;
|
| tr1377:
|
| {
|
| - instruction_start -= 14;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 10);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 14);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5949,6 +6034,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5956,10 +6042,8 @@
|
| goto st904;
|
| tr1385:
|
| {
|
| - instruction_start -= 7;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -5980,6 +6064,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -5987,12 +6072,10 @@
|
| goto st904;
|
| tr1391:
|
| {
|
| - instruction_start -= 13;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 3);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 9);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 13);
|
| - restricted_register = NO_REG;
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, FALSE);
|
| + SandboxRsiOrRdiMakeInteriorInvalidJumpTargets(&instruction_start, data,
|
| + valid_targets, TRUE);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -6013,6 +6096,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6020,15 +6104,10 @@
|
| goto st904;
|
| tr1405:
|
| {
|
| - instruction_start -= 7;
|
| - if (RMFromModRM(instruction_start[2]) !=
|
| - RMFromModRM(instruction_start[6]) ||
|
| - RMFromModRM(instruction_start[2]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 4);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + TRUE, FALSE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -6052,6 +6131,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6059,15 +6139,10 @@
|
| goto st904;
|
| tr1406:
|
| {
|
| - instruction_start -= 7;
|
| - if (RMFromModRM(instruction_start[2]) !=
|
| - RMFromModRM(instruction_start[6]) ||
|
| - RMFromModRM(instruction_start[2]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 4);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + TRUE, FALSE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -6087,6 +6162,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6094,15 +6170,10 @@
|
| goto st904;
|
| tr1410:
|
| {
|
| - instruction_start -= 7;
|
| - if (RMFromModRM(instruction_start[2]) !=
|
| - RegFromModRM(instruction_start[6]) ||
|
| - RMFromModRM(instruction_start[2]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 4);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + TRUE, TRUE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -6126,6 +6197,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6133,15 +6205,10 @@
|
| goto st904;
|
| tr1411:
|
| {
|
| - instruction_start -= 7;
|
| - if (RMFromModRM(instruction_start[2]) !=
|
| - RegFromModRM(instruction_start[6]) ||
|
| - RMFromModRM(instruction_start[2]) != RMFromModRM(*current_position))
|
| - instruction_info_collected |= UNRECOGNIZED_INSTRUCTION;
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 4);
|
| - BitmapClearBit(valid_targets, (instruction_start - data) + 7);
|
| - restricted_register = NO_REG;
|
| - }
|
| + ProcessNaclCallOrNaclJmp(&instruction_info_collected, &instruction_start,
|
| + current_position, data, valid_targets,
|
| + TRUE, TRUE);
|
| + }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| }
|
| @@ -6161,6 +6228,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6168,7 +6236,7 @@
|
| goto st904;
|
| tr1450:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| process_0_operands(&restricted_register, &instruction_info_collected);
|
| @@ -6189,6 +6257,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6196,14 +6265,14 @@
|
| goto st904;
|
| tr1451:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_OPERAND_NAME(0, RegFromOpcode(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| process_1_operand(&restricted_register, &instruction_info_collected,
|
| rex_prefix, operand_states);
|
| @@ -6224,6 +6293,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6231,15 +6301,15 @@
|
| goto st904;
|
| tr1467:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_OPERAND_NAME(0, RegFromOpcode(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| BaseExtentionFromVEX(GET_VEX_PREFIX2()));
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(1, REG_RAX); }
|
| {
|
| process_2_operands_zero_extends(&restricted_register,
|
| @@ -6262,6 +6332,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -6278,73 +6349,73 @@
|
| }
|
| tr81:
|
| { SET_CPU_FEATURE(CPUFeature_CMOV); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st1;
|
| tr83:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st1;
|
| tr235:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st1;
|
| tr250:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st1;
|
| tr393:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st1;
|
| tr496:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st1;
|
| tr415:
|
| { SET_CPU_FEATURE(CPUFeature_MMX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st1;
|
| tr525:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st1;
|
| tr540:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st1;
|
| tr665:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st1;
|
| tr1165:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st1;
|
| tr1425:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st1;
|
| tr1432:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st1;
|
| tr1461:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st1;
|
| st1:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -6719,33 +6790,33 @@
|
| goto tr16;
|
| tr79:
|
| { SET_CPU_FEATURE(CPUFeature_MMX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| tr236:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| tr338:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| tr568:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| tr1163:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| tr1426:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st10;
|
| st10:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -6758,187 +6829,187 @@
|
| }
|
| tr72:
|
| { SET_CPU_FEATURE(CPUFeature_CMOV); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr89:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr237:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st11;
|
| tr252:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st11;
|
| tr394:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr497:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr413:
|
| { SET_CPU_FEATURE(CPUFeature_CMOV); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr526:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr541:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr561:
|
| { SET_CPU_FEATURE(CPUFeature_CMOV); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr686:
|
| {
|
| SET_REPNZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE42); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr689:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_POPCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr690:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_TZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr691:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_LZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st11;
|
| tr1174:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1178:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1162:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1164:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1283:
|
| {
|
| SET_REPNZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1294:
|
| {
|
| SET_REPNZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1296:
|
| {
|
| SET_REPNZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE42); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1305:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1308:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_POPCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1309:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_TZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1310:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_LZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1314:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1315:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_POPCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1316:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_TZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1317:
|
| {
|
| SET_REPZ_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_LZCNT); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st11;
|
| tr1427:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st11;
|
| tr1433:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st11;
|
| tr1463:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st11;
|
| st11:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -6958,28 +7029,28 @@
|
| goto st12;
|
| tr863:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st12;
|
| tr866:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st12;
|
| tr1214:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st12;
|
| tr1216:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7043,7 +7114,7 @@
|
| goto st13;
|
| tr880:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7057,7 +7128,7 @@
|
| goto st13;
|
| tr889:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7071,7 +7142,7 @@
|
| goto st13;
|
| tr907:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7083,7 +7154,7 @@
|
| goto st13;
|
| tr910:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7095,7 +7166,7 @@
|
| goto st13;
|
| tr1228:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7109,7 +7180,7 @@
|
| goto st13;
|
| tr1233:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7123,7 +7194,7 @@
|
| goto st13;
|
| tr1243:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7135,7 +7206,7 @@
|
| goto st13;
|
| tr1245:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7193,7 +7264,7 @@
|
| goto st17;
|
| tr879:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7207,7 +7278,7 @@
|
| goto st17;
|
| tr888:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7221,7 +7292,7 @@
|
| goto st17;
|
| tr1227:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7235,7 +7306,7 @@
|
| goto st17;
|
| tr1232:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7261,28 +7332,28 @@
|
| goto st18;
|
| tr844:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st18;
|
| tr849:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st18;
|
| tr1203:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st18;
|
| tr1207:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7301,28 +7372,28 @@
|
| goto st19;
|
| tr845:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st19;
|
| tr850:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st19;
|
| tr1204:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st19;
|
| tr1208:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -7333,19 +7404,19 @@
|
| case 19:
|
| goto tr34;
|
| tr85:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st20;
|
| tr339:
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st20;
|
| tr1428:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st20;
|
| st20:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -7546,7 +7617,7 @@
|
| }
|
| goto st29;
|
| tr205:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7554,7 +7625,7 @@
|
| }
|
| goto st29;
|
| tr238:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st29;
|
| tr259:
|
| @@ -7566,7 +7637,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st29;
|
| tr448:
|
| {
|
| @@ -7588,7 +7659,7 @@
|
| }
|
| goto st29;
|
| tr315:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7599,7 +7670,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7607,7 +7678,7 @@
|
| }
|
| goto st29;
|
| tr423:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7619,7 +7690,7 @@
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE41); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7627,7 +7698,7 @@
|
| }
|
| goto st29;
|
| tr604:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7639,7 +7710,7 @@
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE41); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7648,7 +7719,7 @@
|
| goto st29;
|
| tr1134:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7657,14 +7728,14 @@
|
| goto st29;
|
| tr1429:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st29;
|
| tr1469:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_OPERAND_NAME(0, RegFromOpcode(*current_position) |
|
| @@ -7674,7 +7745,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st29;
|
| st29:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -7725,7 +7796,7 @@
|
| }
|
| goto st30;
|
| tr323:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7733,7 +7804,7 @@
|
| }
|
| goto st30;
|
| tr239:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st30;
|
| tr260:
|
| @@ -7745,7 +7816,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st30;
|
| tr280:
|
| {
|
| @@ -7770,7 +7841,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -7779,14 +7850,14 @@
|
| goto st30;
|
| tr1430:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st30;
|
| tr1470:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_OPERAND_NAME(0, RegFromOpcode(*current_position) |
|
| @@ -7796,7 +7867,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st30;
|
| st30:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -7830,7 +7901,7 @@
|
| goto _out;
|
| tr1431:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st34;
|
| st34:
|
| @@ -8313,7 +8384,7 @@
|
| goto st55;
|
| tr1436:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st55;
|
| st55:
|
| @@ -8435,28 +8506,28 @@
|
| goto tr160;
|
| goto tr57;
|
| tr1273:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st61;
|
| tr161:
|
| { SET_CPU_FEATURE(CPUFeature_MOVBE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st61;
|
| tr1271:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| goto st61;
|
| tr1275:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st61;
|
| tr422:
|
| { SET_CPU_FEATURE(CPUFeature_MOVBE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st61;
|
| tr679:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st61;
|
| tr585:
|
| { SET_CPU_FEATURE(CPUFeature_MOVBE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st61;
|
| st61:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -8729,7 +8800,7 @@
|
| goto st64;
|
| tr1437:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st64;
|
| st64:
|
| @@ -9075,37 +9146,37 @@
|
| goto tr181;
|
| tr73:
|
| { SET_CPU_FEATURE(CPUFeature_SSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st73;
|
| tr97:
|
| { SET_CPU_FEATURE(CPUFeature_EMMXSSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st73;
|
| tr414:
|
| { SET_CPU_FEATURE(CPUFeature_SSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st73;
|
| tr421:
|
| { SET_CPU_FEATURE(CPUFeature_EMMXSSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st73;
|
| tr562:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st73;
|
| tr664:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st73;
|
| tr1090:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st73;
|
| st73:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9139,7 +9210,7 @@
|
| goto tr57;
|
| tr1488:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st76;
|
| st76:
|
| @@ -9163,35 +9234,35 @@
|
| case 79:
|
| goto tr186;
|
| tr82:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st80;
|
| tr416:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st80;
|
| tr569:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st80;
|
| tr589:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE41); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st80;
|
| tr668:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE41); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st80;
|
| tr1193:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st80;
|
| tr1196:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st80;
|
| st80:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9212,27 +9283,27 @@
|
| goto _again;
|
| }
|
| tr86:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_8_BIT); }
|
| goto st82;
|
| tr87:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| goto st82;
|
| tr401:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_64_BIT); }
|
| goto st82;
|
| tr539:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_16_BIT); }
|
| goto st82;
|
| tr1459:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_8_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_8_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_8_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_8_BIT); }
|
| goto st82;
|
| st82:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9253,15 +9324,15 @@
|
| goto _again;
|
| }
|
| tr90:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| goto st84;
|
| tr1460:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| - { SET_OPERAND_TYPE(1, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| + { SET_OPERAND_TYPE(1, OPERAND_TYPE_32_BIT); }
|
| goto st84;
|
| st84:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9283,29 +9354,29 @@
|
| }
|
| tr94:
|
| { SET_CPU_FEATURE(CPUFeature_EMMXSSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st86;
|
| tr418:
|
| { SET_CPU_FEATURE(CPUFeature_EMMXSSE); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st86;
|
| tr572:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st86;
|
| tr666:
|
| {
|
| SET_DATA16_PREFIX(FALSE);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_SSE2); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st86;
|
| tr1092:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st86;
|
| st86:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9377,7 +9448,7 @@
|
| }
|
| goto st88;
|
| tr324:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -9385,7 +9456,7 @@
|
| }
|
| goto st88;
|
| tr241:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st88;
|
| tr431:
|
| @@ -9408,11 +9479,11 @@
|
| }
|
| goto st88;
|
| tr395:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st88;
|
| tr464:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -9423,7 +9494,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -9432,9 +9503,9 @@
|
| goto st88;
|
| tr1434:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st88;
|
| st88:
|
| @@ -9459,7 +9530,7 @@
|
| goto tr226;
|
| tr1435:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_BRANCH_NOT_TAKEN(TRUE);
|
| @@ -9467,7 +9538,7 @@
|
| goto st92;
|
| tr1439:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_BRANCH_TAKEN(TRUE);
|
| @@ -9512,7 +9583,7 @@
|
| goto tr57;
|
| tr1455:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st95;
|
| st95:
|
| @@ -9607,7 +9678,7 @@
|
| goto st96;
|
| tr1438:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st96;
|
| st96:
|
| @@ -9632,7 +9703,7 @@
|
| goto tr234;
|
| tr1440:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -9643,7 +9714,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st100;
|
| st100:
|
| @@ -9665,13 +9736,13 @@
|
| goto _again;
|
| }
|
| tr245:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st102;
|
| tr1453:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st102;
|
| st102:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9822,13 +9893,13 @@
|
| case 110:
|
| goto tr296;
|
| tr246:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st111;
|
| tr1454:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st111;
|
| st111:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -9883,7 +9954,7 @@
|
| }
|
| goto st112;
|
| tr334:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -10055,7 +10126,7 @@
|
| goto tr314;
|
| tr1456:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st121;
|
| st121:
|
| @@ -10069,7 +10140,7 @@
|
| }
|
| tr1457:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st122;
|
| st122:
|
| @@ -10280,7 +10351,7 @@
|
| goto _again;
|
| }
|
| tr335:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -10320,6 +10391,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -10336,7 +10408,7 @@
|
| }
|
| tr1441:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -10347,7 +10419,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st133;
|
| st133:
|
| @@ -10369,7 +10441,7 @@
|
| goto _again;
|
| }
|
| tr340:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -10409,6 +10481,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -10425,7 +10498,7 @@
|
| }
|
| tr1442:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -10436,7 +10509,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st136;
|
| st136:
|
| @@ -10452,7 +10525,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st137;
|
| st137:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -10490,6 +10563,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -10522,6 +10596,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -10538,7 +10613,7 @@
|
| }
|
| tr1443:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -10549,7 +10624,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st138;
|
| st138:
|
| @@ -10562,13 +10637,13 @@
|
| goto _again;
|
| }
|
| tr254:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st139;
|
| tr1465:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st139;
|
| st139:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -10742,7 +10817,7 @@
|
| goto tr57;
|
| tr1471:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st149;
|
| st149:
|
| @@ -10756,7 +10831,7 @@
|
| }
|
| tr1472:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st150;
|
| st150:
|
| @@ -10770,7 +10845,7 @@
|
| }
|
| tr1475:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st151;
|
| st151:
|
| @@ -10797,7 +10872,7 @@
|
| goto tr57;
|
| tr1476:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st152;
|
| st152:
|
| @@ -10824,7 +10899,7 @@
|
| goto tr57;
|
| tr1477:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st153;
|
| st153:
|
| @@ -10838,7 +10913,7 @@
|
| }
|
| tr1478:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st154;
|
| st154:
|
| @@ -10852,7 +10927,7 @@
|
| }
|
| tr1479:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st155;
|
| st155:
|
| @@ -10866,7 +10941,7 @@
|
| }
|
| tr1480:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st156;
|
| st156:
|
| @@ -10880,7 +10955,7 @@
|
| }
|
| tr1481:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st157;
|
| st157:
|
| @@ -10894,7 +10969,7 @@
|
| }
|
| tr1482:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st158;
|
| st158:
|
| @@ -10908,7 +10983,7 @@
|
| }
|
| tr1483:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st159;
|
| st159:
|
| @@ -10922,7 +10997,7 @@
|
| }
|
| tr1484:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st160;
|
| st160:
|
| @@ -10936,7 +11011,7 @@
|
| }
|
| tr1485:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st161;
|
| st161:
|
| @@ -10950,7 +11025,7 @@
|
| }
|
| tr1486:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st162;
|
| st162:
|
| @@ -10969,7 +11044,7 @@
|
| goto st163;
|
| tr1487:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| @@ -10997,7 +11072,7 @@
|
| goto tr391;
|
| tr1492:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st167;
|
| st167:
|
| @@ -11011,7 +11086,7 @@
|
| }
|
| tr1493:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st168;
|
| st168:
|
| @@ -11025,7 +11100,7 @@
|
| }
|
| tr1494:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st169;
|
| st169:
|
| @@ -11056,7 +11131,7 @@
|
| goto tr57;
|
| tr1495:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st170;
|
| st170:
|
| @@ -11070,7 +11145,7 @@
|
| }
|
| tr1444:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -11081,7 +11156,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st171;
|
| st171:
|
| @@ -11146,15 +11221,15 @@
|
| goto tr427;
|
| goto tr57;
|
| tr397:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st176;
|
| tr836:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st176;
|
| tr837:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st176;
|
| st176:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11305,10 +11380,10 @@
|
| case 184:
|
| goto tr447;
|
| tr398:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st185;
|
| tr536:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st185;
|
| st185:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11477,7 +11552,7 @@
|
| goto _again;
|
| }
|
| tr465:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -11495,7 +11570,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st197;
|
| st197:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11510,7 +11585,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st198;
|
| st198:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11522,10 +11597,10 @@
|
| goto _again;
|
| }
|
| tr404:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st199;
|
| tr542:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st199;
|
| st199:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11684,7 +11759,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st208;
|
| st208:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11786,7 +11861,7 @@
|
| }
|
| tr1500:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -11802,7 +11877,7 @@
|
| goto _again;
|
| }
|
| tr494:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st222;
|
| st222:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11823,7 +11898,7 @@
|
| goto _again;
|
| }
|
| tr498:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st224;
|
| st224:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11897,6 +11972,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -11916,7 +11992,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st227;
|
| st227:
|
| @@ -11932,7 +12008,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st228;
|
| st228:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -11970,6 +12046,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12002,6 +12079,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12018,7 +12096,7 @@
|
| }
|
| tr1508:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -12034,7 +12112,7 @@
|
| goto _again;
|
| }
|
| tr507:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st230;
|
| st230:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12092,6 +12170,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12108,7 +12187,7 @@
|
| }
|
| tr1509:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st232;
|
| st232:
|
| @@ -12144,7 +12223,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st234;
|
| st234:
|
| @@ -12169,7 +12248,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st236;
|
| st236:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12207,6 +12286,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12239,6 +12319,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12255,7 +12336,7 @@
|
| }
|
| tr1525:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -12271,7 +12352,7 @@
|
| goto _again;
|
| }
|
| tr515:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st238;
|
| st238:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12329,6 +12410,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -12348,7 +12430,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st240;
|
| st240:
|
| @@ -12365,7 +12447,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st241;
|
| st241:
|
| @@ -12382,7 +12464,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st242;
|
| st242:
|
| @@ -12399,7 +12481,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st243;
|
| st243:
|
| @@ -12425,7 +12507,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st245;
|
| st245:
|
| @@ -12438,7 +12520,7 @@
|
| goto _again;
|
| }
|
| tr519:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st246;
|
| st246:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12454,7 +12536,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st247;
|
| st247:
|
| @@ -12467,7 +12549,7 @@
|
| goto _again;
|
| }
|
| tr520:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st248;
|
| st248:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12532,7 +12614,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st252;
|
| st252:
|
| @@ -12549,7 +12631,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st253;
|
| st253:
|
| @@ -12562,7 +12644,7 @@
|
| goto _again;
|
| }
|
| tr524:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st254;
|
| st254:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -12578,7 +12660,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st255;
|
| st255:
|
| @@ -12595,7 +12677,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st256;
|
| st256:
|
| @@ -12670,7 +12752,7 @@
|
| }
|
| goto st257;
|
| tr527:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| { SET_OPERAND_NAME(0, REG_RAX); }
|
| goto st257;
|
| tr545:
|
| @@ -12682,10 +12764,10 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st257;
|
| tr642:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -12696,7 +12778,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -13018,7 +13100,7 @@
|
| goto _again;
|
| }
|
| tr535:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_16_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_16_BIT); }
|
| goto st282;
|
| st282:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -13764,7 +13846,7 @@
|
| goto tr57;
|
| tr1458:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st332;
|
| st332:
|
| @@ -13777,7 +13859,7 @@
|
| goto _again;
|
| }
|
| tr692:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, RMFromModRM(*current_position) |
|
| BaseExtentionFromREX(GET_REX_PREFIX()) |
|
| @@ -13817,6 +13899,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -13836,7 +13919,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st334;
|
| st334:
|
| @@ -13849,7 +13932,7 @@
|
| goto _again;
|
| }
|
| tr694:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st335;
|
| st335:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -13886,6 +13969,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -13897,7 +13981,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RSP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -13918,6 +14002,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -13929,7 +14014,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RBP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -13950,6 +14035,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -13969,7 +14055,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st336;
|
| st336:
|
| @@ -13983,7 +14069,7 @@
|
| }
|
| tr1539:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st337;
|
| st337:
|
| @@ -14000,7 +14086,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st338;
|
| st338:
|
| @@ -14017,7 +14103,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st339;
|
| st339:
|
| @@ -14034,7 +14120,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st340;
|
| st340:
|
| @@ -14057,7 +14143,7 @@
|
| }
|
| tr1445:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14068,7 +14154,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st342;
|
| st342:
|
| @@ -14085,7 +14171,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st343;
|
| st343:
|
| @@ -14099,7 +14185,7 @@
|
| }
|
| tr1447:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14110,7 +14196,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st344;
|
| st344:
|
| @@ -14127,7 +14213,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st345;
|
| st345:
|
| @@ -14141,7 +14227,7 @@
|
| }
|
| tr1449:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14152,7 +14238,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st346;
|
| st346:
|
| @@ -14166,7 +14252,7 @@
|
| }
|
| tr1452:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_DATA16_PREFIX(TRUE);
|
| @@ -14264,12 +14350,12 @@
|
| goto tr57;
|
| tr1462:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st355;
|
| st355:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14307,6 +14393,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14339,6 +14426,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14355,7 +14443,7 @@
|
| }
|
| tr1540:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14371,7 +14459,7 @@
|
| goto _again;
|
| }
|
| tr711:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st357;
|
| st357:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14429,6 +14517,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14448,7 +14537,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st359;
|
| st359:
|
| @@ -14464,7 +14553,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st360;
|
| st360:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14502,6 +14591,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14534,6 +14624,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14550,7 +14641,7 @@
|
| }
|
| tr1548:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14566,7 +14657,7 @@
|
| goto _again;
|
| }
|
| tr717:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st362;
|
| st362:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14624,6 +14715,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14643,7 +14735,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st364;
|
| st364:
|
| @@ -14660,7 +14752,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st365;
|
| st365:
|
| @@ -14723,12 +14815,12 @@
|
| goto tr57;
|
| tr1464:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st368;
|
| st368:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14766,6 +14858,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14798,6 +14891,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14814,7 +14908,7 @@
|
| }
|
| tr1553:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -14830,7 +14924,7 @@
|
| goto _again;
|
| }
|
| tr725:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st370;
|
| st370:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -14888,6 +14982,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -14904,7 +14999,7 @@
|
| }
|
| tr1554:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st372;
|
| st372:
|
| @@ -14940,7 +15035,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st374;
|
| st374:
|
| @@ -14966,7 +15061,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st376;
|
| st376:
|
| @@ -14983,7 +15078,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st377;
|
| st377:
|
| @@ -15000,7 +15095,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st378;
|
| st378:
|
| @@ -15017,7 +15112,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st379;
|
| st379:
|
| @@ -15043,7 +15138,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st381;
|
| st381:
|
| @@ -15060,7 +15155,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st382;
|
| st382:
|
| @@ -15077,7 +15172,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st383;
|
| st383:
|
| @@ -15094,7 +15189,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st384;
|
| st384:
|
| @@ -15111,7 +15206,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st385;
|
| st385:
|
| @@ -15128,7 +15223,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st386;
|
| st386:
|
| @@ -15241,7 +15336,7 @@
|
| goto tr57;
|
| tr1466:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st394;
|
| st394:
|
| @@ -15705,11 +15800,11 @@
|
| goto tr57;
|
| tr786:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st420;
|
| tr788:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st420;
|
| st420:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -16009,11 +16104,11 @@
|
| goto tr57;
|
| tr803:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st438;
|
| tr804:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st438;
|
| st438:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -16288,11 +16383,11 @@
|
| goto tr57;
|
| tr821:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st454;
|
| tr822:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st454;
|
| st454:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -16577,28 +16672,28 @@
|
| goto st472;
|
| tr843:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st472;
|
| tr848:
|
| { SET_CPU_FEATURE(CPUFeature_TBM); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st472;
|
| tr1202:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| goto st472;
|
| tr1206:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| {
|
| SET_OPERAND_NAME(0, GetOperandFromVexAMD64(GET_VEX_PREFIX3()));
|
| }
|
| @@ -17318,7 +17413,7 @@
|
| goto tr57;
|
| tr1468:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| { SET_CPU_FEATURE(CPUFeature_x87); }
|
| {
|
| @@ -17340,6 +17435,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -17356,7 +17452,7 @@
|
| }
|
| tr1446:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -17367,7 +17463,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st527;
|
| st527:
|
| @@ -17381,7 +17477,7 @@
|
| }
|
| tr1448:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -17392,7 +17488,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st528;
|
| st528:
|
| @@ -17406,7 +17502,7 @@
|
| }
|
| tr1473:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st529;
|
| st529:
|
| @@ -17677,19 +17773,19 @@
|
| goto tr57;
|
| tr976:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st543;
|
| tr980:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st543;
|
| tr965:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st543;
|
| tr967:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st543;
|
| st543:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -18579,19 +18675,19 @@
|
| goto tr57;
|
| tr1041:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st593;
|
| tr1045:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st593;
|
| tr1031:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st593;
|
| tr1032:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st593;
|
| st593:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -19348,19 +19444,19 @@
|
| }
|
| tr1109:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st637;
|
| tr1113:
|
| { SET_CPU_FEATURE(CPUFeature_BMI1); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st637;
|
| tr1097:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st637;
|
| tr1099:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st637;
|
| st637:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -19428,7 +19524,7 @@
|
| }
|
| tr1098:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st641;
|
| st641:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -19531,7 +19627,7 @@
|
| goto tr57;
|
| tr1100:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st648;
|
| st648:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -19766,11 +19862,11 @@
|
| }
|
| tr1131:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st664;
|
| tr1135:
|
| { SET_CPU_FEATURE(CPUFeature_AVX); }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st664;
|
| st664:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -21300,7 +21396,7 @@
|
| }
|
| tr1474:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st751;
|
| st751:
|
| @@ -21424,7 +21520,7 @@
|
| goto tr57;
|
| tr1489:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_LOCK_PREFIX(TRUE);
|
| @@ -21453,7 +21549,7 @@
|
| }
|
| goto tr57;
|
| tr1272:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st758;
|
| st758:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -21516,7 +21612,7 @@
|
| goto tr57;
|
| tr1490:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st763;
|
| st763:
|
| @@ -21609,7 +21705,7 @@
|
| goto tr57;
|
| tr1491:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st772;
|
| st772:
|
| @@ -21671,7 +21767,7 @@
|
| }
|
| tr1566:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st777;
|
| st777:
|
| @@ -21811,7 +21907,7 @@
|
| }
|
| tr1567:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st786;
|
| st786:
|
| @@ -21828,7 +21924,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st787;
|
| st787:
|
| @@ -21871,7 +21967,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st789;
|
| st789:
|
| @@ -21913,7 +22009,7 @@
|
| goto tr57;
|
| tr1521:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st791;
|
| st791:
|
| @@ -22053,7 +22149,7 @@
|
| }
|
| tr1522:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st800;
|
| st800:
|
| @@ -22070,7 +22166,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st801;
|
| st801:
|
| @@ -22117,7 +22213,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st803;
|
| st803:
|
| @@ -22166,7 +22262,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st805;
|
| st805:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -22182,7 +22278,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st806;
|
| st806:
|
| @@ -22199,7 +22295,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st807;
|
| st807:
|
| @@ -22216,7 +22312,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st808;
|
| st808:
|
| @@ -22251,12 +22347,12 @@
|
| goto tr57;
|
| tr1545:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st810;
|
| st810:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -22294,6 +22390,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22326,6 +22423,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22342,7 +22440,7 @@
|
| }
|
| tr1580:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -22358,7 +22456,7 @@
|
| goto _again;
|
| }
|
| tr1352:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st812;
|
| st812:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -22416,6 +22514,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22435,7 +22534,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st814;
|
| st814:
|
| @@ -22452,7 +22551,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st815;
|
| st815:
|
| @@ -22518,7 +22617,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st818;
|
| st818:
|
| @@ -22565,7 +22664,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st820;
|
| st820:
|
| @@ -22612,12 +22711,12 @@
|
| goto tr57;
|
| tr1546:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st822;
|
| st822:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -22633,7 +22732,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st823;
|
| st823:
|
| @@ -22674,7 +22773,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st825;
|
| st825:
|
| @@ -22691,7 +22790,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st826;
|
| st826:
|
| @@ -22704,7 +22803,7 @@
|
| goto _again;
|
| }
|
| tr1365:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st827;
|
| st827:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -22741,6 +22840,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22752,7 +22852,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RSP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -22773,6 +22873,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22784,7 +22885,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RBP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -22805,6 +22906,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -22824,7 +22926,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st828;
|
| st828:
|
| @@ -22838,7 +22940,7 @@
|
| }
|
| tr1591:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st829;
|
| st829:
|
| @@ -22855,7 +22957,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st830;
|
| st830:
|
| @@ -22872,7 +22974,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st831;
|
| st831:
|
| @@ -22889,7 +22991,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st832;
|
| st832:
|
| @@ -22915,7 +23017,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st834;
|
| st834:
|
| @@ -22932,7 +23034,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st835;
|
| st835:
|
| @@ -22949,7 +23051,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st836;
|
| st836:
|
| @@ -22992,7 +23094,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st838;
|
| st838:
|
| @@ -23037,7 +23139,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st840;
|
| st840:
|
| @@ -23054,7 +23156,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st841;
|
| st841:
|
| @@ -23120,7 +23222,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st844;
|
| st844:
|
| @@ -23167,7 +23269,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st846;
|
| st846:
|
| @@ -23216,7 +23318,7 @@
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st848;
|
| st848:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23232,7 +23334,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st849;
|
| st849:
|
| @@ -23249,7 +23351,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st850;
|
| st850:
|
| @@ -23266,7 +23368,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st851;
|
| st851:
|
| @@ -23301,12 +23403,12 @@
|
| goto tr57;
|
| tr1505:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st853;
|
| st853:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23344,6 +23446,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -23376,6 +23479,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -23392,7 +23496,7 @@
|
| }
|
| tr1592:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| SET_REX_PREFIX(*current_position);
|
| @@ -23408,7 +23512,7 @@
|
| goto _again;
|
| }
|
| tr1388:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st855;
|
| st855:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23466,6 +23570,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -23485,7 +23590,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st857;
|
| st857:
|
| @@ -23502,7 +23607,7 @@
|
| SET_DATA16_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st858;
|
| st858:
|
| @@ -23568,7 +23673,7 @@
|
| SET_REPNZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st861;
|
| st861:
|
| @@ -23615,7 +23720,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st863;
|
| st863:
|
| @@ -23662,12 +23767,12 @@
|
| goto tr57;
|
| tr1506:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= MODIFIABLE_INSTRUCTION;
|
| }
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_32_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_32_BIT); }
|
| goto st865;
|
| st865:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23683,7 +23788,7 @@
|
| SET_REPZ_PREFIX(TRUE);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st866;
|
| st866:
|
| @@ -23724,7 +23829,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st868;
|
| st868:
|
| @@ -23737,7 +23842,7 @@
|
| goto _again;
|
| }
|
| tr1401:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st869;
|
| st869:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23774,6 +23879,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -23793,7 +23899,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st870;
|
| st870:
|
| @@ -23819,7 +23925,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st872;
|
| st872:
|
| @@ -23845,7 +23951,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st874;
|
| st874:
|
| @@ -23862,7 +23968,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st875;
|
| st875:
|
| @@ -23875,7 +23981,7 @@
|
| goto _again;
|
| }
|
| tr1402:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st876;
|
| st876:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -23912,6 +24018,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -23931,7 +24038,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st877;
|
| st877:
|
| @@ -23957,7 +24064,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st879;
|
| st879:
|
| @@ -23983,7 +24090,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st881;
|
| st881:
|
| @@ -24000,7 +24107,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st882;
|
| st882:
|
| @@ -24017,7 +24124,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st883;
|
| st883:
|
| @@ -24030,7 +24137,7 @@
|
| goto _again;
|
| }
|
| tr1413:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st884;
|
| st884:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -24067,6 +24174,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24078,7 +24186,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RSP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -24099,6 +24207,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24110,7 +24219,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RBP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -24131,6 +24240,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24150,7 +24260,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st885;
|
| st885:
|
| @@ -24164,7 +24274,7 @@
|
| }
|
| tr1611:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st886;
|
| st886:
|
| @@ -24181,7 +24291,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st887;
|
| st887:
|
| @@ -24198,7 +24308,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st888;
|
| st888:
|
| @@ -24215,7 +24325,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st889;
|
| st889:
|
| @@ -24241,7 +24351,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st891;
|
| st891:
|
| @@ -24258,7 +24368,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st892;
|
| st892:
|
| @@ -24275,7 +24385,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st893;
|
| st893:
|
| @@ -24292,7 +24402,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st894;
|
| st894:
|
| @@ -24305,7 +24415,7 @@
|
| goto _again;
|
| }
|
| tr1419:
|
| - { SET_OPERAND_TYPE(0, OPERAND_SIZE_64_BIT); }
|
| + { SET_OPERAND_TYPE(0, OPERAND_TYPE_64_BIT); }
|
| goto st895;
|
| st895:
|
| if ( ++( current_position) == ( end_of_bundle) )
|
| @@ -24342,6 +24452,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24353,7 +24464,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RSP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -24374,6 +24485,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24385,7 +24497,7 @@
|
| else
|
| instruction_info_collected |= UNRESTRICTED_RBP_PROCESSED;
|
| restricted_register = NO_REG;
|
| - BitmapClearBit(valid_targets, (instruction_start - data));
|
| + MakeInvalidJumpTarget((instruction_start - data), valid_targets);
|
| }
|
| {
|
| instruction_info_collected |= SPECIAL_INSTRUCTION;
|
| @@ -24406,6 +24518,7 @@
|
| instruction_start = current_position + 1;
|
| instruction_info_collected = 0;
|
| SET_REX_PREFIX(FALSE);
|
| + /* Top three bis of VEX2 are inverted: see AMD/Intel manual. */
|
| SET_VEX_PREFIX2(0xe0);
|
| SET_VEX_PREFIX3(0x00);
|
| operand_states = 0;
|
| @@ -24425,7 +24538,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st896;
|
| st896:
|
| @@ -24439,7 +24552,7 @@
|
| }
|
| tr1618:
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st897;
|
| st897:
|
| @@ -24456,7 +24569,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st898;
|
| st898:
|
| @@ -24473,7 +24586,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st899;
|
| st899:
|
| @@ -24490,7 +24603,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st900;
|
| st900:
|
| @@ -24516,7 +24629,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st902;
|
| st902:
|
| @@ -24533,7 +24646,7 @@
|
| SET_REX_PREFIX(*current_position);
|
| }
|
| {
|
| - BitmapSetBit(valid_targets, current_position - data);
|
| + MakeJumpTargetValid(current_position - data, valid_targets);
|
| }
|
| goto st903;
|
| st903:
|
|
|