Periodic merge of bleeding_edge to experimental code generator branch....

src/assembler-ia32.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 100 matching lines @@
   no_condition  = -1,
 
   overflow      =  0,
   no_overflow   =  1,
   below         =  2,
   above_equal   =  3,
   equal         =  4,
   not_equal     =  5,
   below_equal   =  6,
   above         =  7,
-  sign          =  8,
-  not_sign      =  9,
+  negative      =  8,
+  positive      =  9,
   parity_even   = 10,
   parity_odd    = 11,
   less          = 12,
   greater_equal = 13,
   less_equal    = 14,
   greater       = 15,
 
   // aliases
+  carry         = below,
+  not_carry     = above_equal,
   zero          = equal,
   not_zero      = not_equal,
-  negative      = sign,
-  positive      = not_sign
+  sign          = negative,
+  not_sign      = positive
 };
 
 
 // Returns the equivalent of !cc.
 // Negation of the default no_condition (-1) results in a non-default
 // no_condition value (-2). As long as tests for no_condition check
 // for condition < 0, this will work as expected.
 inline Condition NegateCondition(Condition cc);
 
 // Corresponds to transposing the operands of a comparison.
@@ skipping 131 matching lines @@
 //
 // next field: position of next displacement in the chain (0 = end of list)
 // type field: instruction type
 //
 // A next value of null (0) indicates the end of a chain (note that there can
 // be no displacement at position zero, because there is always at least one
 // instruction byte before the displacement).
 //
 // Displacement _data field layout
 //
-// |31.....1| ......0|
+// |31.....2|1......0|
 // [  next  |  type  |
 
 class Displacement BASE_EMBEDDED {
  public:
   enum Type {
     UNCONDITIONAL_JUMP,
+    CODE_RELATIVE,
     OTHER
   };
 
   int data() const { return data_; }
   Type type() const { return TypeField::decode(data_); }
   void next(Label* L) const {
     int n = NextField::decode(data_);
     n > 0 ? L->link_to(n) : L->Unuse();
   }
   void link_to(Label* L) { init(L, type()); }
 
   explicit Displacement(int data) { data_ = data; }
 
   Displacement(Label* L, Type type) { init(L, type); }
 
   void print() {
     PrintF("%s (%x) ", (type() == UNCONDITIONAL_JUMP ? "jmp" : "[other]"),
                        NextField::decode(data_));
   }
 
  private:
   int data_;
 
-  class TypeField: public BitField<Type, 0, 1> {};
-  class NextField: public BitField<int,  1, 32-1> {};
+  class TypeField: public BitField<Type, 0, 2> {};
+  class NextField: public BitField<int,  2, 32-2> {};
 
   void init(Label* L, Type type);
 };
 
 
 
 // CpuFeatures keeps track of which features are supported by the target CPU.
 // Supported features must be enabled by a Scope before use.
 // Example:
 //   if (CpuFeatures::IsSupported(SSE2)) {
@@ skipping 105 matching lines @@
   // Stack
   void pushad();
   void popad();
 
   void pushfd();
   void popfd();
 
   void push(const Immediate& x);
   void push(Register src);
   void push(const Operand& src);
+  void push(Label* label, RelocInfo::Mode relocation_mode);
 
   void pop(Register dst);
   void pop(const Operand& dst);
 
+  void enter(const Immediate& size);
+  void leave();
+
   // Moves
   void mov_b(Register dst, const Operand& src);
   void mov_b(const Operand& dst, int8_t imm8);
   void mov_b(const Operand& dst, Register src);
 
   void mov_w(Register dst, const Operand& src);
   void mov_w(const Operand& dst, Register src);
 
   void mov(Register dst, int32_t imm32);
   void mov(Register dst, const Immediate& x);
@@ skipping 27 matching lines @@
   void and_(Register dst, int32_t imm32);
   void and_(Register dst, const Operand& src);
   void and_(const Operand& src, Register dst);
   void and_(const Operand& dst, const Immediate& x);
 
   void cmp(Register reg, int32_t imm32);
   void cmp(Register reg, Handle<Object> handle);
   void cmp(Register reg, const Operand& op);
   void cmp(const Operand& op, const Immediate& imm);
 
+  void rep_cmpsb();
+  void rep_cmpsl();
+
   void dec_b(Register dst);
 
   void dec(Register dst);
   void dec(const Operand& dst);
 
   void cdq();
 
   void idiv(Register src);
 
   void imul(Register dst, const Operand& src);
@@ skipping 24 matching lines @@
 
   void shld(Register dst, const Operand& src);
 
   void shl(Register dst, uint8_t imm8);
   void shl(Register dst);
 
   void shrd(Register dst, const Operand& src);
 
   void shr(Register dst, uint8_t imm8);
   void shr(Register dst);
+  void shr_cl(Register dst);
 
   void sub(const Operand& dst, const Immediate& x);
   void sub(Register dst, const Operand& src);
   void sub(const Operand& dst, Register src);
 
   void test(Register reg, const Immediate& imm);
   void test(Register reg, const Operand& op);
   void test(const Operand& op, const Immediate& imm);
 
   void xor_(Register dst, int32_t imm32);
   void xor_(Register dst, const Operand& src);
   void xor_(const Operand& src, Register dst);
   void xor_(const Operand& dst, const Immediate& x);
 
   // Bit operations.
+  void bt(const Operand& dst, Register src);
   void bts(const Operand& dst, Register src);
 
   // Miscellaneous
   void hlt();
   void int3();
   void nop();
   void rdtsc();
   void ret(int imm16);
-  void leave();
 
   // Label operations & relative jumps (PPUM Appendix D)
   //
   // Takes a branch opcode (cc) and a label (L) and generates
   // either a backward branch or a forward branch and links it
   // to the label fixup chain. Usage:
   //
   // Label L;    // unbound label
   // j(cc, &L);  // forward branch to unbound label
   // bind(&L);   // bind label to the current pc
@@ skipping 169 matching lines @@
   void long_at_put(int pos, uint32_t x)  {
     *reinterpret_cast<uint32_t*>(addr_at(pos)) = x;
   }
 
   // code emission
   void GrowBuffer();
   inline void emit(uint32_t x);
   inline void emit(Handle<Object> handle);
   inline void emit(uint32_t x, RelocInfo::Mode rmode);
   inline void emit(const Immediate& x);
+  inline void emit_w(const Immediate& x);
 
   // instruction generation
   void emit_arith_b(int op1, int op2, Register dst, int imm8);
 
   // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81)
   // with a given destination expression and an immediate operand.  It attempts
   // to use the shortest encoding possible.
   // sel specifies the /n in the modrm byte (see the Intel PRM).
   void emit_arith(int sel, Operand dst, const Immediate& x);
 
@@ skipping 42 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ASSEMBLER_IA32_H_