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Issue 10990110: MIPS: Changed "marked" nops to use sll(zero_reg, at, type). (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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573 uint32_t opcode = GetOpcodeField(instr); 573 uint32_t opcode = GetOpcodeField(instr);
574 // Checks if the instruction is a load upper immediate. 574 // Checks if the instruction is a load upper immediate.
575 return opcode == ORI; 575 return opcode == ORI;
576 } 576 }
577 577
578 578
579 bool Assembler::IsNop(Instr instr, unsigned int type) { 579 bool Assembler::IsNop(Instr instr, unsigned int type) {
580 // See Assembler::nop(type). 580 // See Assembler::nop(type).
581 ASSERT(type < 32); 581 ASSERT(type < 32);
582 uint32_t opcode = GetOpcodeField(instr); 582 uint32_t opcode = GetOpcodeField(instr);
583 uint32_t function = GetFunctionField(instr);
583 uint32_t rt = GetRt(instr); 584 uint32_t rt = GetRt(instr);
584 uint32_t rs = GetRs(instr); 585 uint32_t rd = GetRd(instr);
585 uint32_t sa = GetSa(instr); 586 uint32_t sa = GetSa(instr);
586 587
587 // nop(type) == sll(zero_reg, zero_reg, type); 588 // Traditional mips nop == sll(zero_reg, zero_reg, 0)
588 // Technically all these values will be 0 but 589 // When marking non-zero type, use sll(zero_reg, at, type)
589 // this makes more sense to the reader. 590 // to avoid use of mips ssnop and ehb special encodings
591 // of the sll instruction.
590 592
591 bool ret = (opcode == SLL && 593 Register nop_rt_reg = (type == 0) ? zero_reg : at;
592 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && 594 bool ret = (opcode == SPECIAL && function == SLL &&
593 rs == static_cast<uint32_t>(ToNumber(zero_reg)) && 595 rd == static_cast<uint32_t>(ToNumber(zero_reg)) &&
596 rt == static_cast<uint32_t>(ToNumber(nop_rt_reg)) &&
594 sa == type); 597 sa == type);
595 598
596 return ret; 599 return ret;
597 } 600 }
598 601
599 602
600 int32_t Assembler::GetBranchOffset(Instr instr) { 603 int32_t Assembler::GetBranchOffset(Instr instr) {
601 ASSERT(IsBranch(instr)); 604 ASSERT(IsBranch(instr));
602 return ((int16_t)(instr & kImm16Mask)) << 2; 605 return ((int16_t)(instr & kImm16Mask)) << 2;
603 } 606 }
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2283 } 2286 }
2284 2287
2285 if (patched) { 2288 if (patched) {
2286 CPU::FlushICache(pc+2, sizeof(Address)); 2289 CPU::FlushICache(pc+2, sizeof(Address));
2287 } 2290 }
2288 } 2291 }
2289 2292
2290 } } // namespace v8::internal 2293 } } // namespace v8::internal
2291 2294
2292 #endif // V8_TARGET_ARCH_MIPS 2295 #endif // V8_TARGET_ARCH_MIPS
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