Support for unboxed 64-bit integer bitwise operations and equality on ia32.

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
@@ skipping 44 matching lines @@
 }
 
 
 static intptr_t ToInstructionEnd(intptr_t pos) {
   return (pos | 1);
 }
 
 
 FlowGraphAllocator::FlowGraphAllocator(const FlowGraph& flow_graph)
   : flow_graph_(flow_graph),
+    mint_values_(NULL),
     block_order_(flow_graph.reverse_postorder()),
     postorder_(flow_graph.postorder()),
     live_out_(block_order_.length()),
     kill_(block_order_.length()),
     live_in_(block_order_.length()),
     vreg_count_(flow_graph.max_virtual_register_number()),
     live_ranges_(flow_graph.max_virtual_register_number()),
     cpu_regs_(),
     xmm_regs_(),
     blocked_cpu_registers_(),
@@ skipping 310 matching lines @@
     // Shrink the first use interval. It was optimistically expanded to
     // cover the the block from the start to the last use in the block.
     ASSERT(first_use_interval_->start_ <= pos);
     first_use_interval_->start_ = pos;
   }
 }
 
 
 LiveRange* FlowGraphAllocator::GetLiveRange(intptr_t vreg) {
   if (live_ranges_[vreg] == NULL) {
-    live_ranges_[vreg] = new LiveRange(vreg);
+    Location::Representation rep =
+        mint_values_->Contains(vreg) ? Location::kMint : Location::kDouble;
+    live_ranges_[vreg] = new LiveRange(vreg, rep);
   }
   return live_ranges_[vreg];
 }
 
 
 LiveRange* FlowGraphAllocator::MakeLiveRangeForTemporary() {
-  LiveRange* range = new LiveRange(kTempVirtualRegister);
+  Location::Representation ignored = Location::kDouble;
+  LiveRange* range = new LiveRange(kTempVirtualRegister, ignored);
 #if defined(DEBUG)
   temporaries_.Add(range);
 #endif
   return range;
 }
 
 
 void FlowGraphAllocator::BlockRegisterLocation(Location loc,
                                                intptr_t from,
                                                intptr_t to,
                                                bool* blocked_registers,
                                                LiveRange** blocking_ranges) {
   if (blocked_registers[loc.register_code()]) {
     return;
   }
 
   if (blocking_ranges[loc.register_code()] == NULL) {
-    LiveRange* range = new LiveRange(kNoVirtualRegister);
+    Location::Representation ignored = Location::kDouble;
+    LiveRange* range = new LiveRange(kNoVirtualRegister, ignored);
     blocking_ranges[loc.register_code()] = range;
     range->set_assigned_location(loc);
 #if defined(DEBUG)
     temporaries_.Add(range);
 #endif
   }
 
   blocking_ranges[loc.register_code()]->AddUseInterval(from, to);
 }
 
@@ skipping 143 matching lines @@
 static Location::Kind RegisterKindFromPolicy(Location loc) {
   if (loc.policy() == Location::kRequiresXmmRegister) {
     return Location::kXmmRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 static Location::Kind RegisterKindForResult(Instruction* instr) {
-  if (instr->representation() == kUnboxedDouble) {
+  if ((instr->representation() == kUnboxedDouble) ||
+      (instr->representation() == kUnboxedMint)) {
     return Location::kXmmRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 //
 // When describing shape of live ranges in comments below we are going to use
 // the following notation:
@@ skipping 312 matching lines @@
     //              [--)
     //
     // The stack bitmap describes the position i.
     for (intptr_t reg = 0; reg < kNumberOfCpuRegisters; reg++) {
       BlockLocation(Location::RegisterLocation(static_cast<Register>(reg)),
                     pos,
                     pos + 1);
     }
 
     for (intptr_t reg = 0; reg < kNumberOfXmmRegisters; reg++) {
+      Location::Representation ignored = Location::kDouble;
       BlockLocation(
-          Location::XmmRegisterLocation(static_cast<XmmRegister>(reg)),
+          Location::XmmRegisterLocation(static_cast<XmmRegister>(reg), ignored),
           pos,
           pos + 1);
     }
 
 
 #if defined(DEBUG)
     // Verify that temps, inputs and output were specified as fixed
     // locations.  Every register is blocked now so attempt to
     // allocate will not succeed.
     for (intptr_t j = 0; j < locs->temp_count(); j++) {
@@ skipping 447 matching lines @@
 
   UsePosition* first_use_after_split =
       SplitListOfPositions(&uses_, split_pos, split_at_start);
 
   SafepointPosition* first_safepoint_after_split =
       SplitListOfPositions(&first_safepoint_, split_pos, split_at_start);
 
   UseInterval* last_use_interval = (last_before_split == last_use_interval_) ?
     first_after_split : last_use_interval_;
   next_sibling_ = new LiveRange(vreg(),
+                                representation(),
                                 first_use_after_split,
                                 first_after_split,
                                 last_use_interval,
                                 first_safepoint_after_split,
                                 next_sibling_);
 
   TRACE_ALLOC(OS::Print("  split sibling [%"Pd", %"Pd")\n",
                         next_sibling_->Start(), next_sibling_->End()));
 
   last_use_interval_ = last_before_split;
@@ skipping 94 matching lines @@
     range->set_spill_slot(Location::StackSlot(idx));
   } else {
     // Double spill slots are essentially one (x64) or two (ia32) normal
     // word size spill slots.  We use the index of the slot with the lowest
     // address as an index for the double spill slot. In terms of indexes
     // this relation is inverted: so we have to take the highest index.
     const intptr_t slot_idx =
         idx * kDoubleSpillSlotFactor + (kDoubleSpillSlotFactor - 1);
     range->set_spill_slot(
         Location::DoubleStackSlot(
-            cpu_spill_slot_count_ + slot_idx));
+            cpu_spill_slot_count_ + slot_idx, range->representation()));
   }
 
   spilled_.Add(range);
 }
 
 
 void FlowGraphAllocator::MarkAsObjectAtSafepoints(LiveRange* range) {
   intptr_t stack_index = range->spill_slot().stack_index();
   ASSERT(stack_index >= 0);
 
@@ skipping 80 matching lines @@
         free_until = intersection;
         if (free_until == kMaxPosition) break;
       }
     }
   }
 
   // All registers are blocked by active ranges.
   if (free_until <= unallocated->Start()) return false;
 
   TRACE_ALLOC(OS::Print("assigning free register "));
-  TRACE_ALLOC(MakeRegisterLocation(candidate).Print());
+  TRACE_ALLOC(MakeRegisterLocation(candidate, Location::kDouble).Print());
   TRACE_ALLOC(OS::Print(" to %"Pd"\n", unallocated->vreg()));
 
   if (free_until != kMaxPosition) {
     // There was an intersection. Split unallocated.
     TRACE_ALLOC(OS::Print("  splitting at %"Pd"\n", free_until));
     LiveRange* tail = unallocated->SplitAt(free_until);
     AddToUnallocated(tail);
   }
 
   registers_[candidate].Add(unallocated);
-  unallocated->set_assigned_location(MakeRegisterLocation(candidate));
+  unallocated->set_assigned_location(
+      MakeRegisterLocation(candidate, unallocated->representation()));
 
   return true;
 }
 
 
 void FlowGraphAllocator::AllocateAnyRegister(LiveRange* unallocated) {
   UsePosition* register_use =
       unallocated->finger()->FirstRegisterUse(unallocated->Start());
   if (register_use == NULL) {
     Spill(unallocated);
@@ skipping 12 matching lines @@
   }
 
   if (free_until < register_use->pos()) {
     // Can't acquire free register. Spill until we really need one.
     ASSERT(unallocated->Start() < ToInstructionStart(register_use->pos()));
     SpillBetween(unallocated, unallocated->Start(), register_use->pos());
     return;
   }
 
   TRACE_ALLOC(OS::Print("assigning blocked register "));
-  TRACE_ALLOC(MakeRegisterLocation(candidate).Print());
+  TRACE_ALLOC(MakeRegisterLocation(candidate, Location::kDouble).Print());
   TRACE_ALLOC(OS::Print(" to live range %"Pd" until %"Pd"\n",
                         unallocated->vreg(), blocked_at));
 
   if (blocked_at < unallocated->End()) {
     // Register is blocked before the end of the live range.  Split the range
     // at latest at blocked_at position.
     LiveRange* tail = SplitBetween(unallocated,
                                    unallocated->Start(),
                                    blocked_at + 1);
     AddToUnallocated(tail);
@@ skipping 85 matching lines @@
       }
       registers_[reg][i] = NULL;
       first_evicted = i;
     }
   }
 
   // Remove evicted ranges from the array.
   if (first_evicted != -1) RemoveEvicted(reg, first_evicted);
 
   registers_[reg].Add(unallocated);
-  unallocated->set_assigned_location(MakeRegisterLocation(reg));
+  unallocated->set_assigned_location(
+      MakeRegisterLocation(reg, unallocated->representation()));
 }
 
 
 bool FlowGraphAllocator::EvictIntersection(LiveRange* allocated,
                                            LiveRange* unallocated) {
   UseInterval* first_unallocated =
       unallocated->finger()->first_pending_use_interval();
   const intptr_t intersection = FirstIntersection(
       allocated->finger()->first_pending_use_interval(),
       first_unallocated);
@@ skipping 370 matching lines @@
       ASSERT(range->assigned_location().Equals(range->spill_slot()));
     } else {
       AddMoveAt(range->Start() + 1,
                 range->spill_slot(),
                 range->assigned_location());
     }
   }
 }
 
 
+void FlowGraphAllocator::CollectRepresentations() {
+  mint_values_ = new BitVector(flow_graph_.max_virtual_register_number());
+
+  for (BlockIterator it = flow_graph_.reverse_postorder_iterator();
+       !it.Done();
+       it.Advance()) {
+    BlockEntryInstr* block = it.Current();
+    // TODO(fschneider): Support unboxed mint representation for phis.
+    for (ForwardInstructionIterator instr_it(block);
+         !instr_it.Done();
+         instr_it.Advance()) {
+      Instruction* instr = instr_it.Current();
+      if (instr->IsDefinition() && instr->representation() == kUnboxedMint) {
+        mint_values_->Add(instr->AsDefinition()->ssa_temp_index());
+      }
+    }
+  }
+}
+
+
+
 void FlowGraphAllocator::AllocateRegisters() {
+  CollectRepresentations();
+
   EliminateEnvironmentUses();
 
   AnalyzeLiveness();
 
   NumberInstructions();
 
   DiscoverLoops();
 
   BuildLiveRanges();
 
@@ skipping 52 matching lines @@
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart