Support for unboxed 64-bit integer bitwise operations and equality on ia32.

runtime/vm/assembler_ia32_test.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 1637 matching lines @@
 }
 
 
 ASSEMBLER_TEST_RUN(XorpdZeroing, entry) {
   typedef double (*XorpdZeroingCode)(double d);
   double res = reinterpret_cast<XorpdZeroingCode>(entry)(12.56e3);
   EXPECT_FLOAT_EQ(0.0, res, 0.0001);
 }
 
 
+ASSEMBLER_TEST_GENERATE(Orpd, assembler) {
+  __ movsd(XMM0, Address(ESP, kWordSize));
+  __ orpd(XMM0, XMM0);
+  __ pushl(EAX);
+  __ pushl(EAX);
+  __ movsd(Address(ESP, 0), XMM0);
+  __ fldl(Address(ESP, 0));
+  __ popl(EAX);
+  __ popl(EAX);
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(Orpd, entry) {
+  typedef double (*OrpdCode)(double d);
+  double res = reinterpret_cast<OrpdCode>(entry)(12.56e3);
+  EXPECT_FLOAT_EQ(12.56e3, res, 0.0);
+}
+
+
+ASSEMBLER_TEST_GENERATE(AndPd, assembler) {
+  __ movsd(XMM0, Address(ESP, kWordSize));
+  __ andpd(XMM0, XMM0);
+  __ pushl(EAX);
+  __ pushl(EAX);
+  __ movsd(Address(ESP, 0), XMM0);
+  __ fldl(Address(ESP, 0));
+  __ popl(EAX);
+  __ popl(EAX);
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(AndPd, entry) {
+  typedef double (*AndpdCode)(double d);
+  double res = reinterpret_cast<AndpdCode>(entry)(12.56e3);
+  EXPECT_FLOAT_EQ(12.56e3, res, 0.0);
+}
+
+
 ASSEMBLER_TEST_GENERATE(DoubleAbs, assembler) {
   __ movsd(XMM0, Address(ESP, kWordSize));
   __ DoubleAbs(XMM0);
   __ pushl(EAX);
   __ pushl(EAX);
   __ movsd(Address(ESP, 0), XMM0);
   __ fldl(Address(ESP, 0));
   __ popl(EAX);
   __ popl(EAX);
   __ ret();
@@ skipping 194 matching lines @@
                      EAX);
   __ popl(EAX);
   __ popl(CTX);
   __ ret();
 }
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_IA32