Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(488)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: runtime/vm/intrinsifier_mips.cc

Issue 1089003002: Implement bigint shift intrinsics on IA32. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « runtime/vm/intrinsifier_ia32.cc ('k') | runtime/vm/intrinsifier_x64.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: runtime/vm/intrinsifier_mips.cc
===================================================================
--- runtime/vm/intrinsifier_mips.cc (revision 45179)
+++ runtime/vm/intrinsifier_mips.cc (working copy)
@@ -19,6 +19,14 @@
DECLARE_FLAG(bool, enable_type_checks);
+// When entering intrinsics code:
+// S5: IC Data
+// S4: Arguments descriptor
+// RA: Return address
+// The S5, S4 registers can be destroyed only if there is no slow-path, i.e.
+// if the intrinsified method always executes a return.
+// The FP register should not be modified, because it is used by the profiler.
+
#define __ assembler->
« no previous file with comments | « runtime/vm/intrinsifier_ia32.cc ('k') | runtime/vm/intrinsifier_x64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698