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Issue 1089003002: Implement bigint shift intrinsics on IA32. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32.
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "vm/dart_entry.h" 10 #include "vm/dart_entry.h"
(...skipping 6153 matching lines...) Expand 10 before | Expand all | Expand 10 after
6164 if (has_shift_count_check()) { 6164 if (has_shift_count_check()) {
6165 __ cmpl(ECX, Immediate(kMintShiftCountLimit)); 6165 __ cmpl(ECX, Immediate(kMintShiftCountLimit));
6166 __ j(ABOVE, deopt); 6166 __ j(ABOVE, deopt);
6167 } 6167 }
6168 Label done, large_shift; 6168 Label done, large_shift;
6169 switch (op_kind()) { 6169 switch (op_kind()) {
6170 case Token::kSHR: { 6170 case Token::kSHR: {
6171 __ cmpl(ECX, Immediate(31)); 6171 __ cmpl(ECX, Immediate(31));
6172 __ j(ABOVE, &large_shift); 6172 __ j(ABOVE, &large_shift);
6173 6173
6174 __ shrdl(left_lo, left_hi); // Shift count in CL. 6174 __ shrdl(left_lo, left_hi, ECX); // Shift count in CL.
6175 __ sarl(left_hi, ECX); // Shift count in CL. 6175 __ sarl(left_hi, ECX); // Shift count in CL.
6176 __ jmp(&done, Assembler::kNearJump); 6176 __ jmp(&done, Assembler::kNearJump);
6177 6177
6178 __ Bind(&large_shift); 6178 __ Bind(&large_shift);
6179 // No need to subtract 32 from CL, only 5 bits used by sarl. 6179 // No need to subtract 32 from CL, only 5 bits used by sarl.
6180 __ movl(left_lo, left_hi); // Shift by 32. 6180 __ movl(left_lo, left_hi); // Shift by 32.
6181 __ sarl(left_hi, Immediate(31)); // Sign extend left hi. 6181 __ sarl(left_hi, Immediate(31)); // Sign extend left hi.
6182 __ sarl(left_lo, ECX); // Shift count: CL % 32. 6182 __ sarl(left_lo, ECX); // Shift count: CL % 32.
6183 break; 6183 break;
6184 } 6184 }
6185 case Token::kSHL: { 6185 case Token::kSHL: {
6186 if (can_overflow()) { 6186 if (can_overflow()) {
6187 Register temp1 = locs()->temp(0).reg(); 6187 Register temp1 = locs()->temp(0).reg();
6188 Register temp2 = locs()->temp(1).reg(); 6188 Register temp2 = locs()->temp(1).reg();
6189 __ movl(temp1, left_hi); // Preserve high 32 bits. 6189 __ movl(temp1, left_hi); // Preserve high 32 bits.
6190 __ cmpl(ECX, Immediate(31)); 6190 __ cmpl(ECX, Immediate(31));
6191 __ j(ABOVE, &large_shift); 6191 __ j(ABOVE, &large_shift);
6192 6192
6193 __ shldl(left_hi, left_lo); // Shift count in CL. 6193 __ shldl(left_hi, left_lo, ECX); // Shift count in CL.
6194 __ shll(left_lo, ECX); // Shift count in CL. 6194 __ shll(left_lo, ECX); // Shift count in CL.
6195 // Check for overflow by shifting back the high 32 bits 6195 // Check for overflow by shifting back the high 32 bits
6196 // and comparing with the input. 6196 // and comparing with the input.
6197 __ movl(temp2, left_hi); 6197 __ movl(temp2, left_hi);
6198 __ sarl(temp2, ECX); 6198 __ sarl(temp2, ECX);
6199 __ cmpl(temp1, temp2); 6199 __ cmpl(temp1, temp2);
6200 __ j(NOT_EQUAL, deopt); 6200 __ j(NOT_EQUAL, deopt);
6201 __ jmp(&done, Assembler::kNearJump); 6201 __ jmp(&done, Assembler::kNearJump);
6202 6202
6203 __ Bind(&large_shift); 6203 __ Bind(&large_shift);
(...skipping 10 matching lines...) Expand all
6214 // output shifted back shift - 32. 6214 // output shifted back shift - 32.
6215 __ movl(temp2, left_hi); 6215 __ movl(temp2, left_hi);
6216 __ sarl(temp2, ECX); // Shift count: CL % 32. 6216 __ sarl(temp2, ECX); // Shift count: CL % 32.
6217 __ cmpl(left_lo, temp2); 6217 __ cmpl(left_lo, temp2);
6218 __ j(NOT_EQUAL, deopt); 6218 __ j(NOT_EQUAL, deopt);
6219 __ xorl(left_lo, left_lo); // Zero left_lo. 6219 __ xorl(left_lo, left_lo); // Zero left_lo.
6220 } else { 6220 } else {
6221 __ cmpl(ECX, Immediate(31)); 6221 __ cmpl(ECX, Immediate(31));
6222 __ j(ABOVE, &large_shift); 6222 __ j(ABOVE, &large_shift);
6223 6223
6224 __ shldl(left_hi, left_lo); // Shift count in CL. 6224 __ shldl(left_hi, left_lo, ECX); // Shift count in CL.
6225 __ shll(left_lo, ECX); // Shift count in CL. 6225 __ shll(left_lo, ECX); // Shift count in CL.
6226 __ jmp(&done, Assembler::kNearJump); 6226 __ jmp(&done, Assembler::kNearJump);
6227 6227
6228 __ Bind(&large_shift); 6228 __ Bind(&large_shift);
6229 // No need to subtract 32 from CL, only 5 bits used by shll. 6229 // No need to subtract 32 from CL, only 5 bits used by shll.
6230 __ movl(left_hi, left_lo); // Shift by 32. 6230 __ movl(left_hi, left_lo); // Shift by 32.
6231 __ xorl(left_lo, left_lo); // Zero left_lo. 6231 __ xorl(left_lo, left_lo); // Zero left_lo.
6232 __ shll(left_hi, ECX); // Shift count: CL % 32. 6232 __ shll(left_hi, ECX); // Shift count: CL % 32.
6233 } 6233 }
6234 break; 6234 break;
(...skipping 638 matching lines...) Expand 10 before | Expand all | Expand 10 after
6873 __ Drop(1); 6873 __ Drop(1);
6874 __ popl(result); 6874 __ popl(result);
6875 } 6875 }
6876 6876
6877 6877
6878 } // namespace dart 6878 } // namespace dart
6879 6879
6880 #undef __ 6880 #undef __
6881 6881
6882 #endif // defined TARGET_ARCH_IA32 6882 #endif // defined TARGET_ARCH_IA32
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