[turbofan] add MachineType to AllocatedOperand

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
@@ skipping 71 matching lines @@
   for (size_t i = 0; i < instr->OutputCount(); i++) {
     auto output = instr->OutputAt(i);
     if (output->IsDoubleRegister() &&
         DoubleRegisterOperand::cast(output)->index() == index) {
       return true;
     }
   }
   return false;
 }
 
+
+// TODO(dcarney): fix frame to allow frame accesses to half size location.
+int GetByteWidth(MachineType machine_type) {
+  DCHECK_EQ(RepresentationOf(machine_type), machine_type);
+  switch (machine_type) {
+    case kRepBit:
+    case kRepWord8:
+    case kRepWord16:
+    case kRepWord32:
+    case kRepTagged:
+      return kPointerSize;
+    case kRepFloat32:
+    case kRepWord64:
+    case kRepFloat64:
+      return 8;
+    default:
+      UNREACHABLE();
+      return 0;
+  }
+}
+
 }  // namespace
 
 
 UsePosition::UsePosition(LifetimePosition pos, InstructionOperand* operand,
                          void* hint, UsePositionHintType hint_type)
     : operand_(operand), hint_(hint), next_(nullptr), pos_(pos), flags_(0) {
   DCHECK_IMPLIES(hint == nullptr, hint_type == UsePositionHintType::kNone);
   bool register_beneficial = true;
   UsePositionType type = UsePositionType::kAny;
   if (operand_ != nullptr && operand_->IsUnallocated()) {
@@ skipping 105 matching lines @@
 struct LiveRange::SpillAtDefinitionList : ZoneObject {
   SpillAtDefinitionList(int gap_index, InstructionOperand* operand,
                         SpillAtDefinitionList* next)
       : gap_index(gap_index), operand(operand), next(next) {}
   const int gap_index;
   InstructionOperand* const operand;
   SpillAtDefinitionList* const next;
 };
 
 
-LiveRange::LiveRange(int id)
+LiveRange::LiveRange(int id, MachineType machine_type)
     : id_(id),
       spill_start_index_(kMaxInt),
       bits_(0),
       last_interval_(nullptr),
       first_interval_(nullptr),
       first_pos_(nullptr),
       parent_(nullptr),
       next_(nullptr),
       spill_operand_(nullptr),
       spills_at_definition_(nullptr),
       current_interval_(nullptr),
       last_processed_use_(nullptr),
       current_hint_position_(nullptr) {
+  DCHECK(AllocatedOperand::IsSupportedMachineType(machine_type));
   bits_ = SpillTypeField::encode(SpillType::kNoSpillType) |
-          AssignedRegisterField::encode(kUnassignedRegister);
+          AssignedRegisterField::encode(kUnassignedRegister) |
+          MachineTypeField::encode(machine_type);
 }
 
 
 void LiveRange::Verify() const {
   // Walk the positions, verifying that each is in an interval.
   auto interval = first_interval_;
   for (auto pos = first_pos_; pos != nullptr; pos = pos->next()) {
     CHECK(Start() <= pos->pos());
     CHECK(pos->pos() <= End());
     CHECK(interval != nullptr);
@@ skipping 18 matching lines @@
 
 
 void LiveRange::Spill() {
   DCHECK(!spilled());
   DCHECK(!TopLevel()->HasNoSpillType());
   set_spilled(true);
   bits_ = AssignedRegisterField::update(bits_, kUnassignedRegister);
 }
 
 
+RegisterKind LiveRange::kind() const {
+  switch (RepresentationOf(machine_type())) {
+    case kRepFloat32:
+    case kRepFloat64:
+      return DOUBLE_REGISTERS;
+    default:
+      break;
+  }
+  return GENERAL_REGISTERS;
+}
+
+
 void LiveRange::SpillAtDefinition(Zone* zone, int gap_index,
                                   InstructionOperand* operand) {
   DCHECK(HasNoSpillType());
   spills_at_definition_ = new (zone)
       SpillAtDefinitionList(gap_index, operand, spills_at_definition_);
 }
 
 
 void LiveRange::CommitSpillsAtDefinition(InstructionSequence* sequence,
-                                         InstructionOperand* op,
+                                         const InstructionOperand& op,
                                          bool might_be_duplicated) {
-  DCHECK_IMPLIES(op->IsConstant(), spills_at_definition_ == nullptr);
+  DCHECK_IMPLIES(op.IsConstant(), spills_at_definition_ == nullptr);
   DCHECK(!IsChild());
   auto zone = sequence->zone();
   for (auto to_spill = spills_at_definition_; to_spill != nullptr;
        to_spill = to_spill->next) {
     auto instr = sequence->InstructionAt(to_spill->gap_index);
     auto move = instr->GetOrCreateParallelMove(Instruction::START, zone);
     // Skip insertion if it's possible that the move exists already as a
     // constraint move from a fixed output register to a slot.
     if (might_be_duplicated) {
       bool found = false;
       for (auto move_op : *move) {
         if (move_op->IsEliminated()) continue;
-        if (move_op->source() == *to_spill->operand &&
-            move_op->destination() == *op) {
+        if (move_op->source().Equals(*to_spill->operand) &&
+            move_op->destination().Equals(op)) {
           found = true;
           break;
         }
       }
       if (found) continue;
     }
-    move->AddMove(*to_spill->operand, *op);
+    move->AddMove(*to_spill->operand, op);
   }
 }
 
 
 UsePosition* LiveRange::FirstHintPosition(int* register_index) const {
   for (auto pos = first_pos_; pos != nullptr; pos = pos->next()) {
     if (pos->HintRegister(register_index)) return pos;
   }
   return nullptr;
 }
 
 
 void LiveRange::SetSpillOperand(InstructionOperand* operand) {
   DCHECK(HasNoSpillType());
   DCHECK(!operand->IsUnallocated() && !operand->IsImmediate());
   set_spill_type(SpillType::kSpillOperand);
   spill_operand_ = operand;
 }
 
 
 void LiveRange::SetSpillRange(SpillRange* spill_range) {
   DCHECK(HasNoSpillType() || HasSpillRange());
   DCHECK(spill_range);
   set_spill_type(SpillType::kSpillRange);
   spill_range_ = spill_range;
 }
 
 
-void LiveRange::CommitSpillOperand(AllocatedOperand* operand) {
-  DCHECK(HasSpillRange());
-  DCHECK(!IsChild());
-  set_spill_type(SpillType::kSpillOperand);
-  spill_operand_ = operand;
-}
-
-
 UsePosition* LiveRange::NextUsePosition(LifetimePosition start) const {
   UsePosition* use_pos = last_processed_use_;
   if (use_pos == nullptr || use_pos->pos() > start) {
     use_pos = first_pos();
   }
   while (use_pos != nullptr && use_pos->pos() < start) {
     use_pos = use_pos->next();
   }
   last_processed_use_ = use_pos;
   return use_pos;
@@ skipping 38 matching lines @@
   if (use_pos == nullptr) return true;
   return use_pos->pos() > pos.NextStart().End();
 }
 
 
 InstructionOperand LiveRange::GetAssignedOperand() const {
   if (HasRegisterAssigned()) {
     DCHECK(!spilled());
     switch (kind()) {
       case GENERAL_REGISTERS:
-        return RegisterOperand(assigned_register());
+        return RegisterOperand(machine_type(), assigned_register());
       case DOUBLE_REGISTERS:
-        return DoubleRegisterOperand(assigned_register());
-      default:
-        UNREACHABLE();
+        return DoubleRegisterOperand(machine_type(), assigned_register());
     }
   }
   DCHECK(spilled());
   DCHECK(!HasRegisterAssigned());
-  auto op = TopLevel()->GetSpillOperand();
-  DCHECK(!op->IsUnallocated());
-  return *op;
+  if (TopLevel()->HasSpillOperand()) {
+    auto op = TopLevel()->GetSpillOperand();
+    DCHECK(!op->IsUnallocated());
+    return *op;
+  }
+  return TopLevel()->GetSpillRangeOperand();
 }
 
 
+AllocatedOperand LiveRange::GetSpillRangeOperand() const {
+  auto spill_range = GetSpillRange();
+  int index = spill_range->assigned_slot();
+  switch (kind()) {
+    case GENERAL_REGISTERS:
+      return StackSlotOperand(machine_type(), index);
+    case DOUBLE_REGISTERS:
+      return DoubleStackSlotOperand(machine_type(), index);
+  }
+  UNREACHABLE();
+  return StackSlotOperand(kMachNone, 0);
+}
+
+
 UseInterval* LiveRange::FirstSearchIntervalForPosition(
     LifetimePosition position) const {
   if (current_interval_ == nullptr) return first_interval_;
   if (current_interval_->start() > position) {
     current_interval_ = nullptr;
     return first_interval_;
   }
   return current_interval_;
 }
 
@@ skipping 82 matching lines @@
   result->first_pos_ = use_after;
 
   // Discard cached iteration state. It might be pointing
   // to the use that no longer belongs to this live range.
   last_processed_use_ = nullptr;
   current_interval_ = nullptr;
 
   // Link the new live range in the chain before any of the other
   // ranges linked from the range before the split.
   result->parent_ = (parent_ == nullptr) ? this : parent_;
-  result->set_kind(result->parent_->kind());
   result->next_ = next_;
   next_ = result;
 
 #ifdef DEBUG
   Verify();
   result->Verify();
 #endif
 }
 
 
@@ skipping 93 matching lines @@
     prev->set_next(use_pos);
   }
 
   if (prev_hint == nullptr && use_pos->HasHint()) {
     current_hint_position_ = use_pos;
   }
 }
 
 
 void LiveRange::ConvertUsesToOperand(const InstructionOperand& op,
-                                     InstructionOperand* spill_op) {
+                                     const InstructionOperand& spill_op) {
   for (auto pos = first_pos(); pos != nullptr; pos = pos->next()) {
     DCHECK(Start() <= pos->pos() && pos->pos() <= End());
     if (!pos->HasOperand()) continue;
     switch (pos->type()) {
       case UsePositionType::kRequiresSlot:
-        if (spill_op != nullptr) {
-          InstructionOperand::ReplaceWith(pos->operand(), spill_op);
-        }
+        DCHECK(spill_op.IsStackSlot() || spill_op.IsDoubleStackSlot());
+        InstructionOperand::ReplaceWith(pos->operand(), &spill_op);
         break;
       case UsePositionType::kRequiresRegister:
         DCHECK(op.IsRegister() || op.IsDoubleRegister());
       // Fall through.
       case UsePositionType::kAny:
         InstructionOperand::ReplaceWith(pos->operand(), &op);
         break;
     }
   }
 }
@@ skipping 71 matching lines @@
       if (interval2->end() > interval1->start()) {
         return true;
       }
       interval2 = interval2->next();
     }
   }
   return false;
 }
 
 
-SpillRange::SpillRange(LiveRange* parent, Zone* zone) : live_ranges_(zone) {
+SpillRange::SpillRange(LiveRange* parent, Zone* zone)
+    : live_ranges_(zone), assigned_slot_(kUnassignedSlot) {
   DCHECK(!parent->IsChild());
   UseInterval* result = nullptr;
   UseInterval* node = nullptr;
   // Copy the intervals for all ranges.
   for (auto range = parent; range != nullptr; range = range->next()) {
     auto src = range->first_interval();
     while (src != nullptr) {
       auto new_node = new (zone) UseInterval(src->start(), src->end());
       if (result == nullptr) {
         result = new_node;
       } else {
         node->set_next(new_node);
       }
       node = new_node;
       src = src->next();
     }
   }
   use_interval_ = result;
   live_ranges().push_back(parent);
   end_position_ = node->end();
   DCHECK(!parent->HasSpillRange());
   parent->SetSpillRange(this);
 }
 
 
+int SpillRange::ByteWidth() const {
+  return GetByteWidth(live_ranges_[0]->machine_type());
+}
+
+
 bool SpillRange::IsIntersectingWith(SpillRange* other) const {
   if (this->use_interval_ == nullptr || other->use_interval_ == nullptr ||
       this->End() <= other->use_interval_->start() ||
       other->End() <= this->use_interval_->start()) {
     return false;
   }
   return AreUseIntervalsIntersecting(use_interval_, other->use_interval_);
 }
 
 
 bool SpillRange::TryMerge(SpillRange* other) {
-  if (kind() != other->kind() || IsIntersectingWith(other)) return false;
+  // TODO(dcarney): byte widths should be compared here not kinds.
+  if (live_ranges_[0]->kind() != other->live_ranges_[0]->kind() ||
+      IsIntersectingWith(other)) {
+    return false;
+  }
 
   auto max = LifetimePosition::MaxPosition();
   if (End() < other->End() && other->End() != max) {
     end_position_ = other->End();
   }
   other->end_position_ = max;
 
   MergeDisjointIntervals(other->use_interval_);
   other->use_interval_ = nullptr;
 
   for (auto range : other->live_ranges()) {
     DCHECK(range->GetSpillRange() == other);
     range->SetSpillRange(this);
   }
 
   live_ranges().insert(live_ranges().end(), other->live_ranges().begin(),
                        other->live_ranges().end());
   other->live_ranges().clear();
 
   return true;
 }
 
 
-void SpillRange::SetOperand(AllocatedOperand* op) {
-  for (auto range : live_ranges()) {
-    DCHECK(range->GetSpillRange() == this);
-    range->CommitSpillOperand(op);
-  }
-}
-
-
 void SpillRange::MergeDisjointIntervals(UseInterval* other) {
   UseInterval* tail = nullptr;
   auto current = use_interval_;
   while (other != nullptr) {
     // Make sure the 'current' list starts first
     if (current == nullptr || current->start() > other->start()) {
       std::swap(current, other);
     }
     // Check disjointness
     DCHECK(other == nullptr || current->end() <= other->start());
@@ skipping 46 matching lines @@
       phi_map_(allocation_zone()),
       live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()),
       live_ranges_(code->VirtualRegisterCount() * 2, nullptr,
                    allocation_zone()),
       fixed_live_ranges_(this->config()->num_general_registers(), nullptr,
                          allocation_zone()),
       fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr,
                                 allocation_zone()),
       spill_ranges_(allocation_zone()),
       assigned_registers_(nullptr),
-      assigned_double_registers_(nullptr) {
+      assigned_double_registers_(nullptr),
+      virtual_register_count_(code->VirtualRegisterCount()) {
   DCHECK(this->config()->num_general_registers() <=
          RegisterConfiguration::kMaxGeneralRegisters);
   DCHECK(this->config()->num_double_registers() <=
          RegisterConfiguration::kMaxDoubleRegisters);
   spill_ranges().reserve(8);
   assigned_registers_ = new (code_zone())
       BitVector(this->config()->num_general_registers(), code_zone());
   assigned_double_registers_ = new (code_zone())
       BitVector(this->config()->num_aliased_double_registers(), code_zone());
   this->frame()->SetAllocatedRegisters(assigned_registers_);
   this->frame()->SetAllocatedDoubleRegisters(assigned_double_registers_);
 }
 
 
-LiveRange* RegisterAllocationData::LiveRangeFor(int index) {
-  if (index >= static_cast<int>(live_ranges().size())) {
-    live_ranges().resize(index + 1, nullptr);
-  }
-  auto result = live_ranges()[index];
-  if (result == nullptr) {
-    result = NewLiveRange(index);
-    live_ranges()[index] = result;
-  }
-  return result;
-}
-
-
 MoveOperands* RegisterAllocationData::AddGapMove(
     int index, Instruction::GapPosition position,
     const InstructionOperand& from, const InstructionOperand& to) {
   auto instr = code()->InstructionAt(index);
   auto moves = instr->GetOrCreateParallelMove(position, code_zone());
   return moves->AddMove(from, to);
 }
 
 
-LiveRange* RegisterAllocationData::NewLiveRange(int index) {
-  return new (allocation_zone()) LiveRange(index);
+MachineType RegisterAllocationData::MachineTypeFor(int virtual_register) {
+  DCHECK_LT(virtual_register, code()->VirtualRegisterCount());
+  return code()->GetRepresentation(virtual_register);
 }
 
 
+LiveRange* RegisterAllocationData::LiveRangeFor(int index) {
+  if (index >= static_cast<int>(live_ranges().size())) {
+    live_ranges().resize(index + 1, nullptr);
+  }
+  auto result = live_ranges()[index];
+  if (result == nullptr) {
+    result = NewLiveRange(index, MachineTypeFor(index));
+    live_ranges()[index] = result;
+  }
+  return result;
+}
+
+
+LiveRange* RegisterAllocationData::NewLiveRange(int index,
+                                                MachineType machine_type) {
+  return new (allocation_zone()) LiveRange(index, machine_type);
+}
+
+
+LiveRange* RegisterAllocationData::NewChildRangeFor(LiveRange* range) {
+  int vreg = virtual_register_count_++;
+  if (vreg >= static_cast<int>(live_ranges().size())) {
+    live_ranges().resize(vreg + 1, nullptr);
+  }
+  auto child = new (allocation_zone()) LiveRange(vreg, range->machine_type());
+  DCHECK_NULL(live_ranges()[vreg]);
+  live_ranges()[vreg] = child;
+  return child;
+}
+
+
 RegisterAllocationData::PhiMapValue* RegisterAllocationData::InitializePhiMap(
     const InstructionBlock* block, PhiInstruction* phi) {
   auto map_value = new (allocation_zone())
       RegisterAllocationData::PhiMapValue(phi, block, allocation_zone());
   auto res =
       phi_map_.insert(std::make_pair(phi->virtual_register(), map_value));
   DCHECK(res.second);
   USE(res);
   return map_value;
 }
@@ skipping 49 matching lines @@
 
 ConstraintBuilder::ConstraintBuilder(RegisterAllocationData* data)
     : data_(data) {}
 
 
 InstructionOperand* ConstraintBuilder::AllocateFixed(
     UnallocatedOperand* operand, int pos, bool is_tagged) {
   TRACE("Allocating fixed reg for op %d\n", operand->virtual_register());
   DCHECK(operand->HasFixedPolicy());
   InstructionOperand allocated;
+  MachineType machine_type = InstructionSequence::DefaultRepresentation();
+  int virtual_register = operand->virtual_register();
+  if (virtual_register != InstructionOperand::kInvalidVirtualRegister) {
+    machine_type = data()->MachineTypeFor(virtual_register);
+  }
   if (operand->HasFixedSlotPolicy()) {
-    allocated = AllocatedOperand(AllocatedOperand::STACK_SLOT,
+    allocated = AllocatedOperand(AllocatedOperand::STACK_SLOT, machine_type,
                                  operand->fixed_slot_index());
   } else if (operand->HasFixedRegisterPolicy()) {
-    allocated = AllocatedOperand(AllocatedOperand::REGISTER,
+    allocated = AllocatedOperand(AllocatedOperand::REGISTER, machine_type,
                                  operand->fixed_register_index());
   } else if (operand->HasFixedDoubleRegisterPolicy()) {
+    DCHECK_NE(InstructionOperand::kInvalidVirtualRegister, virtual_register);
     allocated = AllocatedOperand(AllocatedOperand::DOUBLE_REGISTER,
-                                 operand->fixed_register_index());
+                                 machine_type, operand->fixed_register_index());
   } else {
     UNREACHABLE();
   }
   InstructionOperand::ReplaceWith(operand, &allocated);
   if (is_tagged) {
     TRACE("Fixed reg is tagged at %d\n", pos);
     auto instr = InstructionAt(pos);
     if (instr->HasReferenceMap()) {
       instr->reference_map()->RecordReference(*operand);
     }
@@ skipping 247 matching lines @@
 
 int LiveRangeBuilder::FixedDoubleLiveRangeID(int index) {
   return -index - 1 - config()->num_general_registers();
 }
 
 
 LiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) {
   DCHECK(index < config()->num_general_registers());
   auto result = data()->fixed_live_ranges()[index];
   if (result == nullptr) {
-    result = data()->NewLiveRange(FixedLiveRangeID(index));
+    result = data()->NewLiveRange(FixedLiveRangeID(index),
+                                  InstructionSequence::DefaultRepresentation());
     DCHECK(result->IsFixed());
-    result->set_kind(GENERAL_REGISTERS);
     result->set_assigned_register(index);
     data()->MarkAllocated(GENERAL_REGISTERS, index);
     data()->fixed_live_ranges()[index] = result;
   }
   return result;
 }
 
 
 LiveRange* LiveRangeBuilder::FixedDoubleLiveRangeFor(int index) {
   DCHECK(index < config()->num_aliased_double_registers());
   auto result = data()->fixed_double_live_ranges()[index];
   if (result == nullptr) {
-    result = data()->NewLiveRange(FixedDoubleLiveRangeID(index));
+    result = data()->NewLiveRange(FixedDoubleLiveRangeID(index), kRepFloat64);
     DCHECK(result->IsFixed());
-    result->set_kind(DOUBLE_REGISTERS);
     result->set_assigned_register(index);
     data()->MarkAllocated(DOUBLE_REGISTERS, index);
     data()->fixed_double_live_ranges()[index] = result;
   }
   return result;
 }
 
 
 LiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) {
   if (operand->IsUnallocated()) {
@@ skipping 279 matching lines @@
     // All phi output operands are killed by this block.
     ProcessPhis(block, live);
     // Now live is live_in for this block except not including values live
     // out on backward successor edges.
     if (block->IsLoopHeader()) ProcessLoopHeader(block, live);
     live_in_sets()[block_id] = live;
   }
   // Postprocess the ranges.
   for (auto range : data()->live_ranges()) {
     if (range == nullptr) continue;
-    range->set_kind(RequiredRegisterKind(range->id()));
     // Give slots to all ranges with a non fixed slot use.
     if (range->has_slot_use() && range->HasNoSpillType()) {
       data()->AssignSpillRangeToLiveRange(range);
     }
     // TODO(bmeurer): This is a horrible hack to make sure that for constant
     // live ranges, every use requires the constant to be in a register.
     // Without this hack, all uses with "any" policy would get the constant
     // operand assigned.
     if (range->HasSpillOperand() && range->GetSpillOperand()->IsConstant()) {
       for (auto pos = range->first_pos(); pos != nullptr; pos = pos->next()) {
@@ skipping 24 matching lines @@
 
 void LiveRangeBuilder::ResolvePhiHint(InstructionOperand* operand,
                                       UsePosition* use_pos) {
   auto it = phi_hints_.find(operand);
   if (it == phi_hints_.end()) return;
   DCHECK(!it->second->IsResolved());
   it->second->ResolveHint(use_pos);
 }
 
 
-RegisterKind LiveRangeBuilder::RequiredRegisterKind(
-    int virtual_register) const {
-  return (code()->IsDouble(virtual_register)) ? DOUBLE_REGISTERS
-                                              : GENERAL_REGISTERS;
-}
-
-
 void LiveRangeBuilder::Verify() const {
   for (auto& hint : phi_hints_) {
     CHECK(hint.second->IsResolved());
   }
   for (auto current : data()->live_ranges()) {
     if (current != nullptr) current->Verify();
   }
 }
 
 
@@ skipping 10 matching lines @@
   TRACE("Splitting live range %d at %d\n", range->id(), pos.value());
 
   if (pos <= range->Start()) return range;
 
   // We can't properly connect liveranges if splitting occurred at the end
   // a block.
   DCHECK(pos.IsStart() || pos.IsGapPosition() ||
          (GetInstructionBlock(code(), pos)->last_instruction_index() !=
           pos.ToInstructionIndex()));
 
-  int vreg = code()->NextVirtualRegister();
-  auto result = LiveRangeFor(vreg);
+  auto result = data()->NewChildRangeFor(range);
   range->SplitAt(pos, result, allocation_zone());
   return result;
 }
 
 
 LiveRange* RegisterAllocator::SplitBetween(LiveRange* range,
                                            LifetimePosition start,
                                            LifetimePosition end) {
   DCHECK(!range->IsFixed());
   TRACE("Splitting live range %d in position between [%d, %d]\n", range->id(),
@@ skipping 983 matching lines @@
       auto other = spill_ranges[j];
       if (!other->IsEmpty()) {
         range->TryMerge(other);
       }
     }
   }
   // Allocate slots for the merged spill ranges.
   for (auto range : spill_ranges) {
     if (range->IsEmpty()) continue;
     // Allocate a new operand referring to the spill slot.
-    auto kind = range->kind();
-    int index = data()->frame()->AllocateSpillSlot(kind == DOUBLE_REGISTERS);
-    auto op_kind = kind == DOUBLE_REGISTERS
-                       ? AllocatedOperand::DOUBLE_STACK_SLOT
-                       : AllocatedOperand::STACK_SLOT;
-    auto op = AllocatedOperand::New(data()->code_zone(), op_kind, index);
-    range->SetOperand(op);
+    int byte_width = range->ByteWidth();
+    int index = data()->frame()->AllocateSpillSlot(byte_width);
+    range->set_assigned_slot(index);
   }
 }
 
 
 void OperandAssigner::CommitAssignment() {
   for (auto range : data()->live_ranges()) {
     if (range == nullptr || range->IsEmpty()) continue;
-    InstructionOperand* spill_operand = nullptr;
-    if (!range->TopLevel()->HasNoSpillType()) {
-      spill_operand = range->TopLevel()->GetSpillOperand();
+    InstructionOperand spill_operand;
+    if (range->TopLevel()->HasSpillOperand()) {
+      spill_operand = *range->TopLevel()->GetSpillOperand();
+    } else if (range->TopLevel()->HasSpillRange()) {
+      spill_operand = range->TopLevel()->GetSpillRangeOperand();
     }
     auto assigned = range->GetAssignedOperand();
     range->ConvertUsesToOperand(assigned, spill_operand);
     if (range->is_phi()) {
       data()->GetPhiMapValueFor(range->id())->CommitAssignment(assigned);
     }
-    if (!range->IsChild() && spill_operand != nullptr) {
+    if (!range->IsChild() && !spill_operand.IsInvalid()) {
       range->CommitSpillsAtDefinition(data()->code(), spill_operand,
                                       range->has_slot_use());
     }
   }
 }
 
 
 ReferenceMapPopulator::ReferenceMapPopulator(RegisterAllocationData* data)
     : data_(data) {}
 
@@ skipping 60 matching lines @@
       auto safe_point_pos =
           LifetimePosition::InstructionFromInstructionIndex(safe_point);
       auto cur = range;
       while (cur != nullptr && !cur->Covers(safe_point_pos)) {
         cur = cur->next();
       }
       if (cur == nullptr) continue;
 
       // Check if the live range is spilled and the safe point is after
       // the spill position.
-      if (range->HasSpillOperand() &&
-          safe_point >= range->spill_start_index() &&
-          !range->GetSpillOperand()->IsConstant()) {
+      if (((range->HasSpillOperand() &&
+            !range->GetSpillOperand()->IsConstant()) ||
+           range->HasSpillRange()) &&
+          safe_point >= range->spill_start_index()) {
         TRACE("Pointer for range %d (spilled at %d) at safe point %d\n",
               range->id(), range->spill_start_index(), safe_point);
-        map->RecordReference(*range->GetSpillOperand());
+        InstructionOperand operand;
+        if (range->HasSpillOperand()) {
+          operand = *range->GetSpillOperand();
+        } else {
+          operand = range->GetSpillRangeOperand();
+        }
+        DCHECK(operand.IsStackSlot());
+        DCHECK_EQ(kRepTagged, AllocatedOperand::cast(operand).machine_type());
+        map->RecordReference(operand);
       }
 
       if (!cur->spilled()) {
         TRACE(
             "Pointer in register for range %d (start at %d) "
             "at safe point %d\n",
             cur->id(), cur->Start().value(), safe_point);
         auto operand = cur->GetAssignedOperand();
         DCHECK(!operand.IsStackSlot());
+        DCHECK_EQ(kRepTagged, AllocatedOperand::cast(operand).machine_type());
         map->RecordReference(operand);
       }
     }
   }
 }
 
 
 namespace {
 
 class LiveRangeBound {
@@ skipping 118 matching lines @@
 
  private:
   const RegisterAllocationData* const data_;
   const int bounds_length_;
   LiveRangeBoundArray* const bounds_;
   Zone* const zone_;
 
   DISALLOW_COPY_AND_ASSIGN(LiveRangeFinder);
 };
 
+
+typedef std::pair<ParallelMove*, InstructionOperand> DelayedInsertionMapKey;
+
+
+struct DelayedInsertionMapCompare {
+  bool operator()(const DelayedInsertionMapKey& a,
+                  const DelayedInsertionMapKey& b) {
+    if (a.first == b.first) {
+      return a.second.Compare(b.second);
+    }
+    return a.first < b.first;
+  }
+};
+
+
+typedef ZoneMap<DelayedInsertionMapKey, InstructionOperand,
+                DelayedInsertionMapCompare> DelayedInsertionMap;
+
 }  // namespace
 
 
 LiveRangeConnector::LiveRangeConnector(RegisterAllocationData* data)
     : data_(data) {}
 
 
 bool LiveRangeConnector::CanEagerlyResolveControlFlow(
     const InstructionBlock* block) const {
   if (block->PredecessorCount() != 1) return false;
@@ skipping 13 matching lines @@
       auto* array = finder.ArrayFor(iterator.Current());
       for (auto pred : block->predecessors()) {
         FindResult result;
         const auto* pred_block = code()->InstructionBlockAt(pred);
         array->Find(block, pred_block, &result);
         if (result.cur_cover_ == result.pred_cover_ ||
             result.cur_cover_->spilled())
           continue;
         auto pred_op = result.pred_cover_->GetAssignedOperand();
         auto cur_op = result.cur_cover_->GetAssignedOperand();
-        if (pred_op == cur_op) continue;
+        if (pred_op.Equals(cur_op)) continue;
         ResolveControlFlow(block, cur_op, pred_block, pred_op);
       }
       iterator.Advance();
     }
   }
 }
 
 
 void LiveRangeConnector::ResolveControlFlow(const InstructionBlock* block,
                                             const InstructionOperand& cur_op,
                                             const InstructionBlock* pred,
                                             const InstructionOperand& pred_op) {
-  DCHECK(pred_op != cur_op);
+  DCHECK(!pred_op.Equals(cur_op));
   int gap_index;
   Instruction::GapPosition position;
   if (block->PredecessorCount() == 1) {
     gap_index = block->first_instruction_index();
     position = Instruction::START;
   } else {
     DCHECK(pred->SuccessorCount() == 1);
     DCHECK(!code()
                 ->InstructionAt(pred->last_instruction_index())
                 ->HasReferenceMap());
     gap_index = pred->last_instruction_index();
     position = Instruction::END;
   }
   data()->AddGapMove(gap_index, position, pred_op, cur_op);
 }
 
 
 void LiveRangeConnector::ConnectRanges(Zone* local_zone) {
-  ZoneMap<std::pair<ParallelMove*, InstructionOperand>, InstructionOperand>
-      delayed_insertion_map(local_zone);
+  DelayedInsertionMap delayed_insertion_map(local_zone);
   for (auto first_range : data()->live_ranges()) {
     if (first_range == nullptr || first_range->IsChild()) continue;
     for (auto second_range = first_range->next(); second_range != nullptr;
          first_range = second_range, second_range = second_range->next()) {
       auto pos = second_range->Start();
       // Add gap move if the two live ranges touch and there is no block
       // boundary.
       if (second_range->spilled()) continue;
       if (first_range->End() != pos) continue;
       if (IsBlockBoundary(code(), pos) &&
           !CanEagerlyResolveControlFlow(GetInstructionBlock(code(), pos))) {
         continue;
       }
       auto prev_operand = first_range->GetAssignedOperand();
       auto cur_operand = second_range->GetAssignedOperand();
-      if (prev_operand == cur_operand) continue;
+      if (prev_operand.Equals(cur_operand)) continue;
       bool delay_insertion = false;
       Instruction::GapPosition gap_pos;
       int gap_index = pos.ToInstructionIndex();
       if (pos.IsGapPosition()) {
         gap_pos = pos.IsStart() ? Instruction::START : Instruction::END;
       } else {
         if (pos.IsStart()) {
           delay_insertion = true;
         } else {
           gap_index++;
@@ skipping 38 matching lines @@
     auto eliminate = moves->PrepareInsertAfter(move);
     to_insert.push_back(move);
     if (eliminate != nullptr) to_eliminate.push_back(eliminate);
   }
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8