[turbofan] remove register operand cache

src/compiler/register-allocator.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_REGISTER_ALLOCATOR_H_
 #define V8_REGISTER_ALLOCATOR_H_
 
 #include "src/compiler/instruction.h"
 #include "src/zone-containers.h"
 
@@ skipping 192 matching lines @@
   typedef BitField8<UsePositionType, 0, 2> TypeField;
   typedef BitField8<bool, 2, 1> RegisterBeneficialField;
   uint8_t flags_;
 
   DISALLOW_COPY_AND_ASSIGN(UsePosition);
 };
 
 class SpillRange;
 
 
-// TODO(dcarney): remove this cache.
-class InstructionOperandCache FINAL : public ZoneObject {
- public:
-  InstructionOperandCache();
-
-  RegisterOperand* GetRegisterOperand(int index) {
-    DCHECK(index >= 0 &&
-           index < static_cast<int>(arraysize(general_register_operands_)));
-    return RegisterOperand::cast(&general_register_operands_[index]);
-  }
-  DoubleRegisterOperand* GetDoubleRegisterOperand(int index) {
-    DCHECK(index >= 0 &&
-           index < static_cast<int>(arraysize(double_register_operands_)));
-    return DoubleRegisterOperand::cast(&double_register_operands_[index]);
-  }
-
- private:
-  InstructionOperand
-      general_register_operands_[RegisterConfiguration::kMaxGeneralRegisters];
-  InstructionOperand
-      double_register_operands_[RegisterConfiguration::kMaxDoubleRegisters];
-
-  DISALLOW_COPY_AND_ASSIGN(InstructionOperandCache);
-};
-
-
 // Representation of SSA values' live ranges as a collection of (continuous)
 // intervals over the instruction ordering.
 class LiveRange FINAL : public ZoneObject {
  public:
   static const int kInvalidAssignment = 0x7fffffff;
 
   LiveRange(int id, Zone* zone);
 
   UseInterval* first_interval() const { return first_interval_; }
   UsePosition* first_pos() const { return first_pos_; }
   LiveRange* parent() const { return parent_; }
   LiveRange* TopLevel() { return (parent_ == nullptr) ? this : parent_; }
   const LiveRange* TopLevel() const {
     return (parent_ == nullptr) ? this : parent_;
   }
   LiveRange* next() const { return next_; }
   bool IsChild() const { return parent() != nullptr; }
   int id() const { return id_; }
   bool IsFixed() const { return id_ < 0; }
   bool IsEmpty() const { return first_interval() == nullptr; }
-  // TODO(dcarney): remove this.
-  InstructionOperand* GetAssignedOperand(InstructionOperandCache* cache) const;
   InstructionOperand GetAssignedOperand() const;
   int assigned_register() const { return assigned_register_; }
   int spill_start_index() const { return spill_start_index_; }
-  void set_assigned_register(int reg, InstructionOperandCache* cache);
+  void set_assigned_register(int reg);
   void MakeSpilled();
   bool is_phi() const { return is_phi_; }
   void set_is_phi(bool is_phi) { is_phi_ = is_phi; }
   bool is_non_loop_phi() const { return is_non_loop_phi_; }
   void set_is_non_loop_phi(bool is_non_loop_phi) {
     is_non_loop_phi_ = is_non_loop_phi;
   }
   bool has_slot_use() const { return has_slot_use_; }
   void set_has_slot_use(bool has_slot_use) { has_slot_use_ = has_slot_use; }
 
@@ skipping 95 matching lines @@
 
 #ifdef DEBUG
   // True if target overlaps an existing interval.
   bool HasOverlap(UseInterval* target) const;
   void Verify() const;
 #endif
 
  private:
   struct SpillAtDefinitionList;
 
-  void ConvertUsesToOperand(InstructionOperand* op,
+  void ConvertUsesToOperand(const InstructionOperand& op,
                             InstructionOperand* spill_op);
   UseInterval* FirstSearchIntervalForPosition(LifetimePosition position) const;
   void AdvanceLastProcessedMarker(UseInterval* to_start_of,
                                   LifetimePosition but_not_past) const;
 
   // TODO(dcarney): pack this structure better.
   int id_;
   bool spilled_ : 1;
   bool has_slot_use_ : 1;  // Relevant only for parent.
   bool is_phi_ : 1;
@@ skipping 229 matching lines @@
   LiveRange* LiveRangeFor(int index);
   Instruction* GetLastInstruction(const InstructionBlock* block);
 
   const char* RegisterName(int allocation_index);
 
   Instruction* InstructionAt(int index) { return code()->InstructionAt(index); }
 
   Frame* frame() const { return frame_; }
   const char* debug_name() const { return debug_name_; }
   const RegisterConfiguration* config() const { return config_; }
-  InstructionOperandCache* operand_cache() const { return operand_cache_; }
   ZoneVector<LiveRange*>& live_ranges() { return live_ranges_; }
   ZoneVector<LiveRange*>& fixed_live_ranges() { return fixed_live_ranges_; }
   ZoneVector<LiveRange*>& fixed_double_live_ranges() {
     return fixed_double_live_ranges_;
   }
   ZoneVector<LiveRange*>& unhandled_live_ranges() {
     return unhandled_live_ranges_;
   }
   ZoneVector<LiveRange*>& active_live_ranges() { return active_live_ranges_; }
   ZoneVector<LiveRange*>& inactive_live_ranges() {
     return inactive_live_ranges_;
   }
   ZoneVector<SpillRange*>& spill_ranges() { return spill_ranges_; }
 
   struct PhiMapValue {
     PhiMapValue(PhiInstruction* phi, const InstructionBlock* block)
         : phi(phi), block(block) {}
     PhiInstruction* const phi;
     const InstructionBlock* const block;
   };
   typedef ZoneMap<int, PhiMapValue> PhiMap;
 
   Zone* const local_zone_;
   Frame* const frame_;
   InstructionSequence* const code_;
   const char* const debug_name_;
 
   const RegisterConfiguration* config_;
-  InstructionOperandCache* const operand_cache_;
   PhiMap phi_map_;
 
   // During liveness analysis keep a mapping from block id to live_in sets
   // for blocks already analyzed.
   ZoneVector<BitVector*> live_in_sets_;
 
   // Liveness analysis results.
   ZoneVector<LiveRange*> live_ranges_;
 
   // Lists of live ranges
@@ skipping 15 matching lines @@
 #endif
 
   DISALLOW_COPY_AND_ASSIGN(RegisterAllocator);
 };
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_REGISTER_ALLOCATOR_H_