Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(118)

Side by Side Diff: src/arm/ic-arm.cc

Issue 10837165: Lattice-based representation inference, powered by left/right specific type feedback for BinaryOps … (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: review feedback; fixed tests Created 8 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/arm/full-codegen-arm.cc ('k') | src/arm/lithium-arm.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1681 matching lines...) Expand 10 before | Expand all | Expand 10 after
1692 return le; 1692 return le;
1693 case Token::GTE: 1693 case Token::GTE:
1694 return ge; 1694 return ge;
1695 default: 1695 default:
1696 UNREACHABLE(); 1696 UNREACHABLE();
1697 return kNoCondition; 1697 return kNoCondition;
1698 } 1698 }
1699 } 1699 }
1700 1700
1701 1701
1702 void CompareIC::UpdateCaches(Handle<Object> x, Handle<Object> y) { 1702 bool CompareIC::HasInlinedSmiCode(Address address) {
1703 HandleScope scope; 1703 // The address of the instruction following the call.
1704 Handle<Code> rewritten; 1704 Address cmp_instruction_address =
1705 State previous_state = GetState(); 1705 Assembler::return_address_from_call_start(address);
1706 State state = TargetState(previous_state, false, x, y);
1707 if (state == GENERIC) {
1708 CompareStub stub(GetCondition(), strict(), NO_COMPARE_FLAGS, r1, r0);
1709 rewritten = stub.GetCode();
1710 } else {
1711 ICCompareStub stub(op_, state);
1712 if (state == KNOWN_OBJECTS) {
1713 stub.set_known_map(Handle<Map>(Handle<JSObject>::cast(x)->map()));
1714 }
1715 rewritten = stub.GetCode();
1716 }
1717 set_target(*rewritten);
1718 1706
1719 #ifdef DEBUG 1707 // If the instruction following the call is not a cmp rx, #yyy, nothing
1720 if (FLAG_trace_ic) { 1708 // was inlined.
1721 PrintF("[CompareIC (%s->%s)#%s]\n", 1709 Instr instr = Assembler::instr_at(cmp_instruction_address);
1722 GetStateName(previous_state), 1710 return Assembler::IsCmpImmediate(instr);
1723 GetStateName(state),
1724 Token::Name(op_));
1725 }
1726 #endif
1727
1728 // Activate inlined smi code.
1729 if (previous_state == UNINITIALIZED) {
1730 PatchInlinedSmiCode(address(), ENABLE_INLINED_SMI_CHECK);
1731 }
1732 } 1711 }
1733 1712
1734 1713
1735 void PatchInlinedSmiCode(Address address, InlinedSmiCheck check) { 1714 void PatchInlinedSmiCode(Address address, InlinedSmiCheck check) {
1736 Address cmp_instruction_address = 1715 Address cmp_instruction_address =
1737 Assembler::return_address_from_call_start(address); 1716 Assembler::return_address_from_call_start(address);
1738 1717
1739 // If the instruction following the call is not a cmp rx, #yyy, nothing 1718 // If the instruction following the call is not a cmp rx, #yyy, nothing
1740 // was inlined. 1719 // was inlined.
1741 Instr instr = Assembler::instr_at(cmp_instruction_address); 1720 Instr instr = Assembler::instr_at(cmp_instruction_address);
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
1792 } else { 1771 } else {
1793 ASSERT(Assembler::GetCondition(branch_instr) == ne); 1772 ASSERT(Assembler::GetCondition(branch_instr) == ne);
1794 patcher.EmitCondition(eq); 1773 patcher.EmitCondition(eq);
1795 } 1774 }
1796 } 1775 }
1797 1776
1798 1777
1799 } } // namespace v8::internal 1778 } } // namespace v8::internal
1800 1779
1801 #endif // V8_TARGET_ARCH_ARM 1780 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « src/arm/full-codegen-arm.cc ('k') | src/arm/lithium-arm.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698