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Side by Side Diff: src/IceTargetLowering.cpp

Issue 1075363002: Add a basic TargetARM32 skeleton which knows nothing. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: remove comments Created 5 years, 8 months ago
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1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===// 1 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the skeleton of the TargetLowering class, 10 // This file implements the skeleton of the TargetLowering class,
11 // specifically invoking the appropriate lowering method for a given 11 // specifically invoking the appropriate lowering method for a given
12 // instruction kind and driving global register allocation. It also 12 // instruction kind and driving global register allocation. It also
13 // implements the non-deleted instruction iteration in 13 // implements the non-deleted instruction iteration in
14 // LoweringContext. 14 // LoweringContext.
15 // 15 //
16 //===----------------------------------------------------------------------===// 16 //===----------------------------------------------------------------------===//
17 17
18 #include "assembler_arm32.h"
18 #include "assembler_ia32.h" 19 #include "assembler_ia32.h"
19 #include "IceCfg.h" // setError() 20 #include "IceCfg.h" // setError()
20 #include "IceCfgNode.h" 21 #include "IceCfgNode.h"
21 #include "IceOperand.h" 22 #include "IceOperand.h"
22 #include "IceRegAlloc.h" 23 #include "IceRegAlloc.h"
23 #include "IceTargetLowering.h" 24 #include "IceTargetLowering.h"
25 #include "IceTargetLoweringARM32.h"
24 #include "IceTargetLoweringX8632.h" 26 #include "IceTargetLoweringX8632.h"
25 27
26 namespace Ice { 28 namespace Ice {
27 29
28 void LoweringContext::init(CfgNode *N) { 30 void LoweringContext::init(CfgNode *N) {
29 Node = N; 31 Node = N;
30 End = getNode()->getInsts().end(); 32 End = getNode()->getInsts().end();
31 rewind(); 33 rewind();
32 advanceForward(Next); 34 advanceForward(Next);
33 } 35 }
(...skipping 21 matching lines...) Expand all
55 skipDeleted(I); 57 skipDeleted(I);
56 } 58 }
57 } 59 }
58 60
59 Inst *LoweringContext::getLastInserted() const { 61 Inst *LoweringContext::getLastInserted() const {
60 assert(LastInserted); 62 assert(LastInserted);
61 return LastInserted; 63 return LastInserted;
62 } 64 }
63 65
64 TargetLowering *TargetLowering::createLowering(TargetArch Target, Cfg *Func) { 66 TargetLowering *TargetLowering::createLowering(TargetArch Target, Cfg *Func) {
65 // These statements can be #ifdef'd to specialize the code generator 67 #define SUBZERO_TARGET(X) \
66 // to a subset of the available targets. TODO: use CRTP. 68 if (Target == Target_##X) \
67 if (Target == Target_X8632) 69 return Target##X::create(Func);
68 return TargetX8632::create(Func); 70 #include "llvm/Config/SZTargets.def"
69 #if 0 71
70 if (Target == Target_X8664)
71 return IceTargetX8664::create(Func);
72 if (Target == Target_ARM32)
73 return IceTargetARM32::create(Func);
74 if (Target == Target_ARM64)
75 return IceTargetARM64::create(Func);
76 #endif
77 Func->setError("Unsupported target"); 72 Func->setError("Unsupported target");
78 return nullptr; 73 return nullptr;
79 } 74 }
80 75
81 TargetLowering::TargetLowering(Cfg *Func) 76 TargetLowering::TargetLowering(Cfg *Func)
82 : Func(Func), Ctx(Func->getContext()), HasComputedFrame(false), 77 : Func(Func), Ctx(Func->getContext()), HasComputedFrame(false),
83 CallsReturnsTwice(false), StackAdjustment(0), Context(), 78 CallsReturnsTwice(false), StackAdjustment(0), NextLabelNumber(0),
84 SnapshotStackAdjustment(0) {} 79 Context(), SnapshotStackAdjustment(0) {}
85 80
86 std::unique_ptr<Assembler> TargetLowering::createAssembler(TargetArch Target, 81 std::unique_ptr<Assembler> TargetLowering::createAssembler(TargetArch Target,
87 Cfg *Func) { 82 Cfg *Func) {
88 // These statements can be #ifdef'd to specialize the assembler 83 // These statements can be #ifdef'd to specialize the assembler
89 // to a subset of the available targets. TODO: use CRTP. 84 // to a subset of the available targets. TODO: use CRTP.
85 // TODO(jvoung): use SZTargets.def (rename AssemblerX86 -> AssemblerX8632),
86 // and make the namespaces consistent.
90 if (Target == Target_X8632) 87 if (Target == Target_X8632)
91 return std::unique_ptr<Assembler>(new x86::AssemblerX86()); 88 return std::unique_ptr<Assembler>(new x86::AssemblerX86());
92 Func->setError("Unsupported target"); 89
90 if (Target == Target_ARM32)
91 return std::unique_ptr<Assembler>(new AssemblerARM32());
92
93 Func->setError("Unsupported target assembler");
93 return nullptr; 94 return nullptr;
94 } 95 }
95 96
96 void TargetLowering::doAddressOpt() { 97 void TargetLowering::doAddressOpt() {
97 if (llvm::isa<InstLoad>(*Context.getCur())) 98 if (llvm::isa<InstLoad>(*Context.getCur()))
98 doAddressOptLoad(); 99 doAddressOptLoad();
99 else if (llvm::isa<InstStore>(*Context.getCur())) 100 else if (llvm::isa<InstStore>(*Context.getCur()))
100 doAddressOptStore(); 101 doAddressOptStore();
101 Context.advanceCur(); 102 Context.advanceCur();
102 Context.advanceNext(); 103 Context.advanceNext();
(...skipping 119 matching lines...) Expand 10 before | Expand all | Expand 10 after
222 RegSetMask RegExclude = RegSet_None; 223 RegSetMask RegExclude = RegSet_None;
223 RegInclude |= RegSet_CallerSave; 224 RegInclude |= RegSet_CallerSave;
224 RegInclude |= RegSet_CalleeSave; 225 RegInclude |= RegSet_CalleeSave;
225 if (hasFramePointer()) 226 if (hasFramePointer())
226 RegExclude |= RegSet_FramePointer; 227 RegExclude |= RegSet_FramePointer;
227 LinearScan.init(Kind); 228 LinearScan.init(Kind);
228 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude); 229 llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
229 LinearScan.scan(RegMask, Ctx->getFlags().shouldRandomizeRegAlloc()); 230 LinearScan.scan(RegMask, Ctx->getFlags().shouldRandomizeRegAlloc());
230 } 231 }
231 232
233 InstCall *TargetLowering::makeHelperCall(const IceString &Name, Variable *Dest,
234 SizeT MaxSrcs) {
235 const bool HasTailCall = false;
236 Constant *CallTarget = Ctx->getConstantExternSym(Name);
237 InstCall *Call =
238 InstCall::create(Func, MaxSrcs, Dest, CallTarget, HasTailCall);
239 return Call;
240 }
241
232 std::unique_ptr<TargetDataLowering> 242 std::unique_ptr<TargetDataLowering>
233 TargetDataLowering::createLowering(GlobalContext *Ctx) { 243 TargetDataLowering::createLowering(GlobalContext *Ctx) {
234 // These statements can be #ifdef'd to specialize the code generator
235 // to a subset of the available targets. TODO: use CRTP.
236 TargetArch Target = Ctx->getFlags().getTargetArch(); 244 TargetArch Target = Ctx->getFlags().getTargetArch();
237 if (Target == Target_X8632) 245 #define SUBZERO_TARGET(X) \
238 return std::unique_ptr<TargetDataLowering>(TargetDataX8632::create(Ctx)); 246 if (Target == Target_##X) \
239 #if 0 247 return std::unique_ptr<TargetDataLowering>(TargetData##X::create(Ctx));
240 if (Target == Target_X8664) 248 #include "llvm/Config/SZTargets.def"
241 return std::unique_ptr<TargetDataLowering>(TargetDataX8664::create(Ctx)); 249
242 if (Target == Target_ARM32) 250 llvm_unreachable("Unsupported target data lowering");
243 return std::unique_ptr<TargetDataLowering>(TargetDataARM32::create(Ctx));
244 if (Target == Target_ARM64)
245 return std::unique_ptr<TargetDataLowering>(TargetDataARM64::create(Ctx));
246 #endif
247 llvm_unreachable("Unsupported target");
248 return nullptr; 251 return nullptr;
249 } 252 }
250 253
251 TargetDataLowering::~TargetDataLowering() {} 254 TargetDataLowering::~TargetDataLowering() {}
252 255
253 } // end of namespace Ice 256 } // end of namespace Ice
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