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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 1075103002: [x86] Support immediate indices for StoreWriteBarrier. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties.h" 7 #include "src/compiler/node-properties.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
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201 Node* base = node->InputAt(0); 201 Node* base = node->InputAt(0);
202 Node* index = node->InputAt(1); 202 Node* index = node->InputAt(1);
203 Node* value = node->InputAt(2); 203 Node* value = node->InputAt(2);
204 204
205 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); 205 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
206 MachineType rep = RepresentationOf(store_rep.machine_type()); 206 MachineType rep = RepresentationOf(store_rep.machine_type());
207 if (store_rep.write_barrier_kind() == kFullWriteBarrier) { 207 if (store_rep.write_barrier_kind() == kFullWriteBarrier) {
208 DCHECK_EQ(kRepTagged, rep); 208 DCHECK_EQ(kRepTagged, rep);
209 // TODO(dcarney): refactor RecordWrite function to take temp registers 209 // TODO(dcarney): refactor RecordWrite function to take temp registers
210 // and pass them here instead of using fixed regs 210 // and pass them here instead of using fixed regs
211 // TODO(dcarney): handle immediate indices. 211 if (g.CanBeImmediate(index)) {
212 InstructionOperand temps[] = {g.TempRegister(ecx), g.TempRegister(edx)}; 212 InstructionOperand temps[] = {g.TempRegister(ecx), g.TempRegister()};
213 Emit(kIA32StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, ebx), 213 Emit(kIA32StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, ebx),
214 g.UseFixed(index, ecx), g.UseFixed(value, edx), arraysize(temps), 214 g.UseImmediate(index), g.UseFixed(value, ecx), arraysize(temps),
215 temps); 215 temps);
216 } else {
217 InstructionOperand temps[] = {g.TempRegister(ecx), g.TempRegister(edx)};
218 Emit(kIA32StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, ebx),
219 g.UseFixed(index, ecx), g.UseFixed(value, edx), arraysize(temps),
220 temps);
221 }
216 return; 222 return;
217 } 223 }
218 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind()); 224 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind());
219 225
220 ArchOpcode opcode; 226 ArchOpcode opcode;
221 switch (rep) { 227 switch (rep) {
222 case kRepFloat32: 228 case kRepFloat32:
223 opcode = kIA32Movss; 229 opcode = kIA32Movss;
224 break; 230 break;
225 case kRepFloat64: 231 case kRepFloat64:
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1218 if (CpuFeatures::IsSupported(SSE4_1)) { 1224 if (CpuFeatures::IsSupported(SSE4_1)) {
1219 flags |= MachineOperatorBuilder::kFloat64RoundDown | 1225 flags |= MachineOperatorBuilder::kFloat64RoundDown |
1220 MachineOperatorBuilder::kFloat64RoundTruncate; 1226 MachineOperatorBuilder::kFloat64RoundTruncate;
1221 } 1227 }
1222 return flags; 1228 return flags;
1223 } 1229 }
1224 1230
1225 } // namespace compiler 1231 } // namespace compiler
1226 } // namespace internal 1232 } // namespace internal
1227 } // namespace v8 1233 } // namespace v8
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