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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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44 V(Mips64Dror) \ | 44 V(Mips64Dror) \ |
45 V(Mips64Mov) \ | 45 V(Mips64Mov) \ |
46 V(Mips64Tst) \ | 46 V(Mips64Tst) \ |
47 V(Mips64Cmp) \ | 47 V(Mips64Cmp) \ |
48 V(Mips64CmpS) \ | 48 V(Mips64CmpS) \ |
49 V(Mips64AddS) \ | 49 V(Mips64AddS) \ |
50 V(Mips64SubS) \ | 50 V(Mips64SubS) \ |
51 V(Mips64MulS) \ | 51 V(Mips64MulS) \ |
52 V(Mips64DivS) \ | 52 V(Mips64DivS) \ |
53 V(Mips64ModS) \ | 53 V(Mips64ModS) \ |
| 54 V(Mips64AbsS) \ |
54 V(Mips64SqrtS) \ | 55 V(Mips64SqrtS) \ |
55 V(Mips64CmpD) \ | 56 V(Mips64CmpD) \ |
56 V(Mips64AddD) \ | 57 V(Mips64AddD) \ |
57 V(Mips64SubD) \ | 58 V(Mips64SubD) \ |
58 V(Mips64MulD) \ | 59 V(Mips64MulD) \ |
59 V(Mips64DivD) \ | 60 V(Mips64DivD) \ |
60 V(Mips64ModD) \ | 61 V(Mips64ModD) \ |
| 62 V(Mips64AbsD) \ |
61 V(Mips64SqrtD) \ | 63 V(Mips64SqrtD) \ |
62 V(Mips64Float64RoundDown) \ | 64 V(Mips64Float64RoundDown) \ |
63 V(Mips64Float64RoundTruncate) \ | 65 V(Mips64Float64RoundTruncate) \ |
64 V(Mips64Float64RoundUp) \ | 66 V(Mips64Float64RoundUp) \ |
65 V(Mips64CvtSD) \ | 67 V(Mips64CvtSD) \ |
66 V(Mips64CvtDS) \ | 68 V(Mips64CvtDS) \ |
67 V(Mips64TruncWD) \ | 69 V(Mips64TruncWD) \ |
68 V(Mips64TruncUwD) \ | 70 V(Mips64TruncUwD) \ |
69 V(Mips64CvtDW) \ | 71 V(Mips64CvtDW) \ |
70 V(Mips64CvtDUw) \ | 72 V(Mips64CvtDUw) \ |
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109 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 111 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
110 V(MRI) /* [%r0 + K] */ \ | 112 V(MRI) /* [%r0 + K] */ \ |
111 V(MRR) /* [%r0 + %r1] */ | 113 V(MRR) /* [%r0 + %r1] */ |
112 | 114 |
113 | 115 |
114 } // namespace compiler | 116 } // namespace compiler |
115 } // namespace internal | 117 } // namespace internal |
116 } // namespace v8 | 118 } // namespace v8 |
117 | 119 |
118 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 120 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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