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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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33 V(MipsRor) \ | 33 V(MipsRor) \ |
34 V(MipsMov) \ | 34 V(MipsMov) \ |
35 V(MipsTst) \ | 35 V(MipsTst) \ |
36 V(MipsCmp) \ | 36 V(MipsCmp) \ |
37 V(MipsCmpS) \ | 37 V(MipsCmpS) \ |
38 V(MipsAddS) \ | 38 V(MipsAddS) \ |
39 V(MipsSubS) \ | 39 V(MipsSubS) \ |
40 V(MipsMulS) \ | 40 V(MipsMulS) \ |
41 V(MipsDivS) \ | 41 V(MipsDivS) \ |
42 V(MipsModS) \ | 42 V(MipsModS) \ |
| 43 V(MipsAbsS) \ |
43 V(MipsSqrtS) \ | 44 V(MipsSqrtS) \ |
44 V(MipsCmpD) \ | 45 V(MipsCmpD) \ |
45 V(MipsAddD) \ | 46 V(MipsAddD) \ |
46 V(MipsSubD) \ | 47 V(MipsSubD) \ |
47 V(MipsMulD) \ | 48 V(MipsMulD) \ |
48 V(MipsDivD) \ | 49 V(MipsDivD) \ |
49 V(MipsModD) \ | 50 V(MipsModD) \ |
| 51 V(MipsAbsD) \ |
50 V(MipsSqrtD) \ | 52 V(MipsSqrtD) \ |
51 V(MipsFloat64RoundDown) \ | 53 V(MipsFloat64RoundDown) \ |
52 V(MipsFloat64RoundTruncate) \ | 54 V(MipsFloat64RoundTruncate) \ |
53 V(MipsFloat64RoundUp) \ | 55 V(MipsFloat64RoundUp) \ |
54 V(MipsCvtSD) \ | 56 V(MipsCvtSD) \ |
55 V(MipsCvtDS) \ | 57 V(MipsCvtDS) \ |
56 V(MipsTruncWD) \ | 58 V(MipsTruncWD) \ |
57 V(MipsTruncUwD) \ | 59 V(MipsTruncUwD) \ |
58 V(MipsCvtDW) \ | 60 V(MipsCvtDW) \ |
59 V(MipsCvtDUw) \ | 61 V(MipsCvtDUw) \ |
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96 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 98 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
97 V(MRI) /* [%r0 + K] */ \ | 99 V(MRI) /* [%r0 + K] */ \ |
98 V(MRR) /* [%r0 + %r1] */ | 100 V(MRR) /* [%r0 + %r1] */ |
99 | 101 |
100 | 102 |
101 } // namespace compiler | 103 } // namespace compiler |
102 } // namespace internal | 104 } // namespace internal |
103 } // namespace v8 | 105 } // namespace v8 |
104 | 106 |
105 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 107 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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