| Index: silk/arm/macros_armv4.h
|
| diff --git a/silk/arm/macros_armv4.h b/silk/arm/macros_armv4.h
|
| index 58df6c2e2b319f91df03e9fc4665bfdf57f44d34..3f30e97288fd77b3a2298df668a419777164c622 100644
|
| --- a/silk/arm/macros_armv4.h
|
| +++ b/silk/arm/macros_armv4.h
|
| @@ -30,7 +30,7 @@ POSSIBILITY OF SUCH DAMAGE.
|
|
|
| /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
|
| #undef silk_SMULWB
|
| -static inline opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
|
| +static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
|
| {
|
| unsigned rd_lo;
|
| int rd_hi;
|
| @@ -50,7 +50,7 @@ static inline opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
|
|
|
| /* (a32 * (b32 >> 16)) >> 16 */
|
| #undef silk_SMULWT
|
| -static inline opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b)
|
| +static OPUS_INLINE opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b)
|
| {
|
| unsigned rd_lo;
|
| int rd_hi;
|
| @@ -70,7 +70,7 @@ static inline opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b)
|
|
|
| /* (a32 * b32) >> 16 */
|
| #undef silk_SMULWW
|
| -static inline opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
|
| +static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
|
| {
|
| unsigned rd_lo;
|
| int rd_hi;
|
| @@ -85,7 +85,7 @@ static inline opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
|
| #define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b))
|
|
|
| #undef silk_SMLAWW
|
| -static inline opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b,
|
| +static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b,
|
| opus_int32 c)
|
| {
|
| unsigned rd_lo;
|
|
|