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Side by Side Diff: silk/arm/SigProc_FIX_armv5e.h

Issue 107243004: Updating Opus to release 1.1 (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/deps/third_party/opus
Patch Set: Created 7 years ago
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1 /*********************************************************************** 1 /***********************************************************************
2 Copyright (c) 2006-2011, Skype Limited. All rights reserved. 2 Copyright (c) 2006-2011, Skype Limited. All rights reserved.
3 Copyright (c) 2013 Parrot 3 Copyright (c) 2013 Parrot
4 Redistribution and use in source and binary forms, with or without 4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions 5 modification, are permitted provided that the following conditions
6 are met: 6 are met:
7 - Redistributions of source code must retain the above copyright notice, 7 - Redistributions of source code must retain the above copyright notice,
8 this list of conditions and the following disclaimer. 8 this list of conditions and the following disclaimer.
9 - Redistributions in binary form must reproduce the above copyright 9 - Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in the 10 notice, this list of conditions and the following disclaimer in the
(...skipping 12 matching lines...) Expand all
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE. 26 POSSIBILITY OF SUCH DAMAGE.
27 ***********************************************************************/ 27 ***********************************************************************/
28 28
29 #ifndef SILK_SIGPROC_FIX_ARMv5E_H 29 #ifndef SILK_SIGPROC_FIX_ARMv5E_H
30 #define SILK_SIGPROC_FIX_ARMv5E_H 30 #define SILK_SIGPROC_FIX_ARMv5E_H
31 31
32 #undef silk_SMULTT 32 #undef silk_SMULTT
33 static inline opus_int32 silk_SMULTT_armv5e(opus_int32 a, opus_int32 b) 33 static OPUS_INLINE opus_int32 silk_SMULTT_armv5e(opus_int32 a, opus_int32 b)
34 { 34 {
35 opus_int32 res; 35 opus_int32 res;
36 __asm__( 36 __asm__(
37 "#silk_SMULTT\n\t" 37 "#silk_SMULTT\n\t"
38 "smultt %0, %1, %2\n\t" 38 "smultt %0, %1, %2\n\t"
39 : "=r"(res) 39 : "=r"(res)
40 : "%r"(a), "r"(b) 40 : "%r"(a), "r"(b)
41 ); 41 );
42 return res; 42 return res;
43 } 43 }
44 #define silk_SMULTT(a, b) (silk_SMULTT_armv5e(a, b)) 44 #define silk_SMULTT(a, b) (silk_SMULTT_armv5e(a, b))
45 45
46 #undef silk_SMLATT 46 #undef silk_SMLATT
47 static inline opus_int32 silk_SMLATT_armv5e(opus_int32 a, opus_int32 b, 47 static OPUS_INLINE opus_int32 silk_SMLATT_armv5e(opus_int32 a, opus_int32 b,
48 opus_int32 c) 48 opus_int32 c)
49 { 49 {
50 opus_int32 res; 50 opus_int32 res;
51 __asm__( 51 __asm__(
52 "#silk_SMLATT\n\t" 52 "#silk_SMLATT\n\t"
53 "smlatt %0, %1, %2, %3\n\t" 53 "smlatt %0, %1, %2, %3\n\t"
54 : "=r"(res) 54 : "=r"(res)
55 : "%r"(b), "r"(c), "r"(a) 55 : "%r"(b), "r"(c), "r"(a)
56 ); 56 );
57 return res; 57 return res;
58 } 58 }
59 #define silk_SMLATT(a, b, c) (silk_SMLATT_armv5e(a, b, c)) 59 #define silk_SMLATT(a, b, c) (silk_SMLATT_armv5e(a, b, c))
60 60
61 #endif 61 #endif
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