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Side by Side Diff: celt/arm/fixed_armv4.h

Issue 107243004: Updating Opus to release 1.1 (Closed) Base URL: svn://svn.chromium.org/chrome/trunk/deps/third_party/opus
Patch Set: Created 7 years ago
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1 /* Copyright (C) 2013 Xiph.Org Foundation and contributors */ 1 /* Copyright (C) 2013 Xiph.Org Foundation and contributors */
2 /* 2 /*
3 Redistribution and use in source and binary forms, with or without 3 Redistribution and use in source and binary forms, with or without
4 modification, are permitted provided that the following conditions 4 modification, are permitted provided that the following conditions
5 are met: 5 are met:
6 6
7 - Redistributions of source code must retain the above copyright 7 - Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer. 8 notice, this list of conditions and the following disclaimer.
9 9
10 - Redistributions in binary form must reproduce the above copyright 10 - Redistributions in binary form must reproduce the above copyright
(...skipping 11 matching lines...) Expand all
22 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */ 25 */
26 26
27 #ifndef FIXED_ARMv4_H 27 #ifndef FIXED_ARMv4_H
28 #define FIXED_ARMv4_H 28 #define FIXED_ARMv4_H
29 29
30 /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 b its */ 30 /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 b its */
31 #undef MULT16_32_Q16 31 #undef MULT16_32_Q16
32 static inline opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b) 32 static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b)
33 { 33 {
34 unsigned rd_lo; 34 unsigned rd_lo;
35 int rd_hi; 35 int rd_hi;
36 __asm__( 36 __asm__(
37 "#MULT16_32_Q16\n\t" 37 "#MULT16_32_Q16\n\t"
38 "smull %0, %1, %2, %3\n\t" 38 "smull %0, %1, %2, %3\n\t"
39 : "=&r"(rd_lo), "=&r"(rd_hi) 39 : "=&r"(rd_lo), "=&r"(rd_hi)
40 : "%r"(b),"r"(a<<16) 40 : "%r"(b),"r"(a<<16)
41 ); 41 );
42 return rd_hi; 42 return rd_hi;
43 } 43 }
44 #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b)) 44 #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b))
45 45
46 46
47 /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 b its */ 47 /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 b its */
48 #undef MULT16_32_Q15 48 #undef MULT16_32_Q15
49 static inline opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b) 49 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b)
50 { 50 {
51 unsigned rd_lo; 51 unsigned rd_lo;
52 int rd_hi; 52 int rd_hi;
53 __asm__( 53 __asm__(
54 "#MULT16_32_Q15\n\t" 54 "#MULT16_32_Q15\n\t"
55 "smull %0, %1, %2, %3\n\t" 55 "smull %0, %1, %2, %3\n\t"
56 : "=&r"(rd_lo), "=&r"(rd_hi) 56 : "=&r"(rd_lo), "=&r"(rd_hi)
57 : "%r"(b), "r"(a<<16) 57 : "%r"(b), "r"(a<<16)
58 ); 58 );
59 /*We intentionally don't OR in the high bit of rd_lo for speed.*/ 59 /*We intentionally don't OR in the high bit of rd_lo for speed.*/
60 return rd_hi<<1; 60 return rd_hi<<1;
61 } 61 }
62 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b)) 62 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b))
63 63
64 64
65 /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. 65 /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
66 b must fit in 31 bits. 66 b must fit in 31 bits.
67 Result fits in 32 bits. */ 67 Result fits in 32 bits. */
68 #undef MAC16_32_Q15 68 #undef MAC16_32_Q15
69 #define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b)) 69 #define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b))
70 70
71 71
72 /** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 b its */ 72 /** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 b its */
73 #undef MULT32_32_Q31 73 #undef MULT32_32_Q31
74 #define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))> >31) 74 #define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))> >31)
75 75
76 #endif 76 #endif
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