Updating Opus to release 1.1

celt/arm/armcpu.c

 /* Copyright (c) 2010 Xiph.Org Foundation
  * Copyright (c) 2013 Parrot */
 /*
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions
    are met:
 
    - Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.
 
@@ skipping 31 matching lines @@
 #define OPUS_CPU_ARM_EDSP  (1<<1)
 #define OPUS_CPU_ARM_MEDIA (1<<2)
 #define OPUS_CPU_ARM_NEON  (1<<3)
 
 #if defined(_MSC_VER)
 /*For GetExceptionCode() and EXCEPTION_ILLEGAL_INSTRUCTION.*/
 # define WIN32_LEAN_AND_MEAN
 # define WIN32_EXTRA_LEAN
 # include <windows.h>
 
-static inline opus_uint32 opus_cpu_capabilities(void){
+static OPUS_INLINE opus_uint32 opus_cpu_capabilities(void){
   opus_uint32 flags;
   flags=0;
-  /* MSVC has no inline __asm support for ARM, but it does let you __emit
+  /* MSVC has no OPUS_INLINE __asm support for ARM, but it does let you __emit
    * instructions via their assembled hex code.
    * All of these instructions should be essentially nops. */
-# if defined(ARMv5E_ASM)
+# if defined(OPUS_ARM_MAY_HAVE_EDSP)
   __try{
     /*PLD [r13]*/
     __emit(0xF5DDF000);
     flags|=OPUS_CPU_ARM_EDSP;
   }
   __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){
     /*Ignore exception.*/
   }
-#  if defined(ARMv6E_ASM)
+#  if defined(OPUS_ARM_MAY_HAVE_MEDIA)
   __try{
     /*SHADD8 r3,r3,r3*/
     __emit(0xE6333F93);
     flags|=OPUS_CPU_ARM_MEDIA;
   }
   __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){
     /*Ignore exception.*/
   }
-#   if defined(ARM_HAVE_NEON)
+#   if defined(OPUS_ARM_MAY_HAVE_NEON)
   __try{
     /*VORR q0,q0,q0*/
     __emit(0xF2200150);
     flags|=OPUS_CPU_ARM_NEON;
   }
   __except(GetExceptionCode()==EXCEPTION_ILLEGAL_INSTRUCTION){
     /*Ignore exception.*/
   }
 #   endif
 #  endif
@@ skipping 13 matching lines @@
   cpuinfo = fopen("/proc/cpuinfo", "r");
 
   if(cpuinfo != NULL)
   {
     /* 512 should be enough for anybody (it's even enough for all the flags that
      * x86 has accumulated... so far). */
     char buf[512];
 
     while(fgets(buf, 512, cpuinfo) != NULL)
     {
+# if defined(OPUS_ARM_MAY_HAVE_EDSP) || defined(OPUS_ARM_MAY_HAVE_NEON)
       /* Search for edsp and neon flag */
       if(memcmp(buf, "Features", 8) == 0)
       {
         char *p;
+#  if defined(OPUS_ARM_MAY_HAVE_EDSP)
         p = strstr(buf, " edsp");
         if(p != NULL && (p[5] == ' ' || p[5] == '\n'))
           flags |= OPUS_CPU_ARM_EDSP;
+#  endif
 
+#  if defined(OPUS_ARM_MAY_HAVE_NEON)
         p = strstr(buf, " neon");
         if(p != NULL && (p[5] == ' ' || p[5] == '\n'))
           flags |= OPUS_CPU_ARM_NEON;
+#  endif
       }
+# endif
 
+# if defined(OPUS_ARM_MAY_HAVE_MEDIA)
       /* Search for media capabilities (>= ARMv6) */
       if(memcmp(buf, "CPU architecture:", 17) == 0)
       {
         int version;
         version = atoi(buf+17);
 
         if(version >= 6)
           flags |= OPUS_CPU_ARM_MEDIA;
       }
+# endif
     }
 
     fclose(cpuinfo);
   }
   return flags;
 }
 #else
 /* The feature registers which can tell us what the processor supports are
  * accessible in priveleged modes only, so we can't have a general user-space
  * detection method like on x86.*/
@@ skipping 15 matching lines @@
   arch++;
 
   if(!(flags & OPUS_CPU_ARM_NEON))
     return arch;
   arch++;
 
   return arch;
 }
 
 #endif