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Side by Side Diff: src/compiler/ppc/instruction-selector-ppc.cc

Issue 1072173002: PPC: Match -0 - x with sign bit flip. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties.h" 7 #include "src/compiler/node-properties.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 891 matching lines...) Expand 10 before | Expand all | Expand 10 after
902 } 902 }
903 903
904 904
905 void InstructionSelector::VisitFloat64Add(Node* node) { 905 void InstructionSelector::VisitFloat64Add(Node* node) {
906 // TODO(mbrandy): detect multiply-add 906 // TODO(mbrandy): detect multiply-add
907 VisitRRR(this, kPPC_AddDouble, node); 907 VisitRRR(this, kPPC_AddDouble, node);
908 } 908 }
909 909
910 910
911 void InstructionSelector::VisitFloat32Sub(Node* node) { 911 void InstructionSelector::VisitFloat32Sub(Node* node) {
912 PPCOperandGenerator g(this);
913 Float32BinopMatcher m(node);
914 if (m.left().IsMinusZero()) {
915 Emit(kPPC_NegDouble, g.DefineAsRegister(node),
916 g.UseRegister(m.right().node()));
917 return;
918 }
912 VisitRRR(this, kPPC_SubDouble, node); 919 VisitRRR(this, kPPC_SubDouble, node);
913 } 920 }
914 921
915 922
916 void InstructionSelector::VisitFloat64Sub(Node* node) { 923 void InstructionSelector::VisitFloat64Sub(Node* node) {
917 // TODO(mbrandy): detect multiply-subtract 924 // TODO(mbrandy): detect multiply-subtract
918 PPCOperandGenerator g(this); 925 PPCOperandGenerator g(this);
919 Float64BinopMatcher m(node); 926 Float64BinopMatcher m(node);
920 if (m.left().IsMinusZero() && m.right().IsFloat64RoundDown() && 927 if (m.left().IsMinusZero()) {
921 CanCover(m.node(), m.right().node())) { 928 if (m.right().IsFloat64RoundDown() &&
922 if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub && 929 CanCover(m.node(), m.right().node())) {
923 CanCover(m.right().node(), m.right().InputAt(0))) { 930 if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub &&
924 Float64BinopMatcher mright0(m.right().InputAt(0)); 931 CanCover(m.right().node(), m.right().InputAt(0))) {
925 if (mright0.left().IsMinusZero()) { 932 Float64BinopMatcher mright0(m.right().InputAt(0));
926 // -floor(-x) = ceil(x) 933 if (mright0.left().IsMinusZero()) {
927 Emit(kPPC_CeilDouble, g.DefineAsRegister(node), 934 // -floor(-x) = ceil(x)
928 g.UseRegister(mright0.right().node())); 935 Emit(kPPC_CeilDouble, g.DefineAsRegister(node),
929 return; 936 g.UseRegister(mright0.right().node()));
937 return;
938 }
930 } 939 }
931 } 940 }
941 Emit(kPPC_NegDouble, g.DefineAsRegister(node),
942 g.UseRegister(m.right().node()));
943 return;
932 } 944 }
933 VisitRRR(this, kPPC_SubDouble, node); 945 VisitRRR(this, kPPC_SubDouble, node);
934 } 946 }
935 947
936 948
937 void InstructionSelector::VisitFloat32Mul(Node* node) { 949 void InstructionSelector::VisitFloat32Mul(Node* node) {
938 VisitRRR(this, kPPC_MulDouble, node); 950 VisitRRR(this, kPPC_MulDouble, node);
939 } 951 }
940 952
941 953
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1530 MachineOperatorBuilder::kFloat64Min | 1542 MachineOperatorBuilder::kFloat64Min |
1531 MachineOperatorBuilder::kFloat64RoundDown | 1543 MachineOperatorBuilder::kFloat64RoundDown |
1532 MachineOperatorBuilder::kFloat64RoundTruncate | 1544 MachineOperatorBuilder::kFloat64RoundTruncate |
1533 MachineOperatorBuilder::kFloat64RoundTiesAway; 1545 MachineOperatorBuilder::kFloat64RoundTiesAway;
1534 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f. 1546 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
1535 } 1547 }
1536 1548
1537 } // namespace compiler 1549 } // namespace compiler
1538 } // namespace internal 1550 } // namespace internal
1539 } // namespace v8 1551 } // namespace v8
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