Enable stub generation using Hydrogen/Lithium (again)

src/arm/codegen-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 55 matching lines @@
   if (!FLAG_fast_math) return &exp;
   size_t actual_size;
   byte* buffer = static_cast<byte*>(OS::Allocate(1 * KB, &actual_size, true));
   if (buffer == NULL) return &exp;
   ExternalReference::InitializeMathExpData();
 
   MacroAssembler masm(NULL, buffer, static_cast<int>(actual_size));
 
   {
     CpuFeatures::Scope use_vfp(VFP2);
-    DoubleRegister input = d0;
-    DoubleRegister result = d1;
-    DoubleRegister double_scratch1 = d2;
-    DoubleRegister double_scratch2 = d3;
+    DwVfpRegister input = d0;
+    DwVfpRegister result = d1;
+    DwVfpRegister double_scratch1 = d2;
+    DwVfpRegister double_scratch2 = d3;
     Register temp1 = r4;
     Register temp2 = r5;
     Register temp3 = r6;
 
     if (masm.use_eabi_hardfloat()) {
       // Input value is in d0 anyway, nothing to do.
     } else {
       __ vmov(input, r0, r1);
     }
     __ Push(temp3, temp2, temp1);
@@ skipping 430 matching lines @@
   __ bind(&done);
 }
 
 
 static MemOperand ExpConstant(int index, Register base) {
   return MemOperand(base, index * kDoubleSize);
 }
 
 
 void MathExpGenerator::EmitMathExp(MacroAssembler* masm,
-                                   DoubleRegister input,
-                                   DoubleRegister result,
-                                   DoubleRegister double_scratch1,
-                                   DoubleRegister double_scratch2,
+                                   DwVfpRegister input,
+                                   DwVfpRegister result,
+                                   DwVfpRegister double_scratch1,
+                                   DwVfpRegister double_scratch2,
                                    Register temp1,
                                    Register temp2,
                                    Register temp3) {
   ASSERT(!input.is(result));
   ASSERT(!input.is(double_scratch1));
   ASSERT(!input.is(double_scratch2));
   ASSERT(!result.is(double_scratch1));
   ASSERT(!result.is(double_scratch2));
   ASSERT(!double_scratch1.is(double_scratch2));
   ASSERT(!temp1.is(temp2));
@@ skipping 110 matching lines @@
     patcher.masm()->add(r0, pc, Operand(-8));
     patcher.masm()->ldr(pc, MemOperand(pc, -4));
     patcher.masm()->dd(reinterpret_cast<uint32_t>(stub->instruction_start()));
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM