Enable stub generation using Hydrogen/Lithium (again)

src/ia32/assembler-ia32.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 47 matching lines @@
 //
 // 3) By not using an enum, we are possibly preventing the compiler from
 // doing certain constant folds, which may significantly reduce the
 // code generated for some assembly instructions (because they boil down
 // to a few constants). If this is a problem, we could change the code
 // such that we use an enum in optimized mode, and the struct in debug
 // mode. This way we get the compile-time error checking in debug mode
 // and best performance in optimized code.
 //
 struct Register {
-  static const int kNumAllocatableRegisters = 6;
+  static const int kMaxNumAllocatableRegisters = 6;
+  static int NumAllocatableRegisters() {
+    return kMaxNumAllocatableRegisters;
+  }
   static const int kNumRegisters = 8;
 
   static inline const char* AllocationIndexToString(int index);
 
   static inline int ToAllocationIndex(Register reg);
 
   static inline Register FromAllocationIndex(int index);
 
   static Register from_code(int code) {
     ASSERT(code >= 0);
@@ skipping 33 matching lines @@
 const Register edx = { kRegister_edx_Code };
 const Register ebx = { kRegister_ebx_Code };
 const Register esp = { kRegister_esp_Code };
 const Register ebp = { kRegister_ebp_Code };
 const Register esi = { kRegister_esi_Code };
 const Register edi = { kRegister_edi_Code };
 const Register no_reg = { kRegister_no_reg_Code };
 
 
 inline const char* Register::AllocationIndexToString(int index) {
-  ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+  ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters);
   // This is the mapping of allocation indices to registers.
   const char* const kNames[] = { "eax", "ecx", "edx", "ebx", "esi", "edi" };
   return kNames[index];
 }
 
 
 inline int Register::ToAllocationIndex(Register reg) {
   ASSERT(reg.is_valid() && !reg.is(esp) && !reg.is(ebp));
   return (reg.code() >= 6) ? reg.code() - 2 : reg.code();
 }
 
 
 inline Register Register::FromAllocationIndex(int index)  {
-  ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+  ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters);
   return (index >= 4) ? from_code(index + 2) : from_code(index);
 }
 
 
-struct XMMRegister {
-  static const int kNumAllocatableRegisters = 7;
-  static const int kNumRegisters = 8;
+struct IntelDoubleRegister {
+  static const int kMaxNumAllocatableRegisters = 7;
+  explicit IntelDoubleRegister(int code) { code_ = code; }
+  static int NumAllocatableRegisters();
+  static int NumRegisters();
+  static const char* AllocationIndexToString(int index);
 
-  static int ToAllocationIndex(XMMRegister reg) {
+  static int ToAllocationIndex(IntelDoubleRegister reg) {
     ASSERT(reg.code() != 0);
     return reg.code() - 1;
   }
 
-  static XMMRegister FromAllocationIndex(int index) {
-    ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+  static IntelDoubleRegister FromAllocationIndex(int index) {
+    ASSERT(index >= 0 && index < NumAllocatableRegisters());
     return from_code(index + 1);
   }
 
+  static IntelDoubleRegister from_code(int code) {
+    IntelDoubleRegister r = IntelDoubleRegister(code);
+    return r;
+  }
+
+  bool is_valid() const {
+    return 0 <= code_ && code_ < NumRegisters();
+  }
+  bool is(IntelDoubleRegister reg) const { return code_ == reg.code_; }

[Jakob Kummerow, 2012/11/28 16:28:22]

Wouldn't this return xmm0.is(x87tos) == true? Is that intentional?

[danno, 2012/11/30 16:23:24]

Done.

+  int code() const {
+    ASSERT(is_valid());
+    return code_;
+  }
+
+  int code_;
+};
+
+struct XMMRegister : IntelDoubleRegister {
+  static const int kNumAllocatableRegisters = 7;
+  static const int kNumRegisters = 8;
+
+  explicit XMMRegister(int code) : IntelDoubleRegister(code) {}
+
+  static XMMRegister from_code(int code) {
+    XMMRegister r = XMMRegister(code);

[Jakob Kummerow, 2012/11/28 16:28:22]

just "return XMMRegister(code);"?

[danno, 2012/11/30 16:23:24]

Done.

+    return r;
+  }
+
+  static XMMRegister FromAllocationIndex(int index) {
+    ASSERT(index >= 0 && index < NumAllocatableRegisters());
+    return from_code(index + 1);
+  }
+
   static const char* AllocationIndexToString(int index) {
     ASSERT(index >= 0 && index < kNumAllocatableRegisters);
     const char* const names[] = {
       "xmm1",
       "xmm2",
       "xmm3",
       "xmm4",
       "xmm5",
       "xmm6",
       "xmm7"
     };
     return names[index];
   }
-
-  static XMMRegister from_code(int code) {
-    XMMRegister r = { code };
-    return r;
-  }
-
-  bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; }
-  bool is(XMMRegister reg) const { return code_ == reg.code_; }
-  int code() const {
-    ASSERT(is_valid());
-    return code_;
-  }
-
-  int code_;
 };
 
 
-const XMMRegister xmm0 = { 0 };
-const XMMRegister xmm1 = { 1 };
-const XMMRegister xmm2 = { 2 };
-const XMMRegister xmm3 = { 3 };
-const XMMRegister xmm4 = { 4 };
-const XMMRegister xmm5 = { 5 };
-const XMMRegister xmm6 = { 6 };
-const XMMRegister xmm7 = { 7 };
+const XMMRegister xmm0 = XMMRegister(0);
+const XMMRegister xmm1 = XMMRegister(1);
+const XMMRegister xmm2 = XMMRegister(2);
+const XMMRegister xmm3 = XMMRegister(3);
+const XMMRegister xmm4 = XMMRegister(4);
+const XMMRegister xmm5 = XMMRegister(5);
+const XMMRegister xmm6 = XMMRegister(6);
+const XMMRegister xmm7 = XMMRegister(7);
 
+struct X87TopOfStackRegister : IntelDoubleRegister {
+  static const int kNumAllocatableRegisters = 1;
+  static const int kNumRegisters = 1;
 
-typedef XMMRegister DoubleRegister;
+  explicit X87TopOfStackRegister(int code)
+      : IntelDoubleRegister(code) {}
+
+  static const char* AllocationIndexToString(int index) {
+    ASSERT(index >= 0 && index < kNumAllocatableRegisters);
+    const char* const names[] = {
+      "st0",
+    };
+    return names[index];
+  }
+  static int ToAllocationIndex(X87TopOfStackRegister reg) {
+    ASSERT(reg.code() == 0);
+    return 0;
+  }
+};
+
+const X87TopOfStackRegister x87tos = X87TopOfStackRegister(0);
+
+typedef IntelDoubleRegister DoubleRegister;
 
 
 enum Condition {
   // any value < 0 is considered no_condition
   no_condition  = -1,
 
   overflow      =  0,
   no_overflow   =  1,
   below         =  2,
   above_equal   =  3,
@@ skipping 1001 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_IA32_ASSEMBLER_IA32_H_