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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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44 V(ArmUxth) \ | 44 V(ArmUxth) \ |
45 V(ArmUxtab) \ | 45 V(ArmUxtab) \ |
46 V(ArmUxtah) \ | 46 V(ArmUxtah) \ |
47 V(ArmVcmpF32) \ | 47 V(ArmVcmpF32) \ |
48 V(ArmVaddF32) \ | 48 V(ArmVaddF32) \ |
49 V(ArmVsubF32) \ | 49 V(ArmVsubF32) \ |
50 V(ArmVmulF32) \ | 50 V(ArmVmulF32) \ |
51 V(ArmVmlaF32) \ | 51 V(ArmVmlaF32) \ |
52 V(ArmVmlsF32) \ | 52 V(ArmVmlsF32) \ |
53 V(ArmVdivF32) \ | 53 V(ArmVdivF32) \ |
| 54 V(ArmVabsF32) \ |
54 V(ArmVnegF32) \ | 55 V(ArmVnegF32) \ |
55 V(ArmVsqrtF32) \ | 56 V(ArmVsqrtF32) \ |
56 V(ArmVcmpF64) \ | 57 V(ArmVcmpF64) \ |
57 V(ArmVaddF64) \ | 58 V(ArmVaddF64) \ |
58 V(ArmVsubF64) \ | 59 V(ArmVsubF64) \ |
59 V(ArmVmulF64) \ | 60 V(ArmVmulF64) \ |
60 V(ArmVmlaF64) \ | 61 V(ArmVmlaF64) \ |
61 V(ArmVmlsF64) \ | 62 V(ArmVmlsF64) \ |
62 V(ArmVdivF64) \ | 63 V(ArmVdivF64) \ |
63 V(ArmVmodF64) \ | 64 V(ArmVmodF64) \ |
| 65 V(ArmVabsF64) \ |
64 V(ArmVnegF64) \ | 66 V(ArmVnegF64) \ |
65 V(ArmVsqrtF64) \ | 67 V(ArmVsqrtF64) \ |
66 V(ArmVrintmF64) \ | 68 V(ArmVrintmF64) \ |
67 V(ArmVrintpF64) \ | 69 V(ArmVrintpF64) \ |
68 V(ArmVrintzF64) \ | 70 V(ArmVrintzF64) \ |
69 V(ArmVrintaF64) \ | 71 V(ArmVrintaF64) \ |
70 V(ArmVcvtF32F64) \ | 72 V(ArmVcvtF32F64) \ |
71 V(ArmVcvtF64F32) \ | 73 V(ArmVcvtF64F32) \ |
72 V(ArmVcvtF64S32) \ | 74 V(ArmVcvtF64S32) \ |
73 V(ArmVcvtF64U32) \ | 75 V(ArmVcvtF64U32) \ |
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110 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 112 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
111 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 113 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
112 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 114 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
113 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 115 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
114 | 116 |
115 } // namespace compiler | 117 } // namespace compiler |
116 } // namespace internal | 118 } // namespace internal |
117 } // namespace v8 | 119 } // namespace v8 |
118 | 120 |
119 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 121 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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