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Side by Side Diff: runtime/vm/simulator_arm.cc

Issue 1062593003: Fixes ARM multiplication instruction version checking. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <setjmp.h> // NOLINT 5 #include <setjmp.h> // NOLINT
6 #include <stdlib.h> 6 #include <stdlib.h>
7 7
8 #include "vm/globals.h" 8 #include "vm/globals.h"
9 #if defined(TARGET_ARCH_ARM) 9 #if defined(TARGET_ARCH_ARM)
10 10
(...skipping 1710 matching lines...) Expand 10 before | Expand all | Expand 10 after
1721 int32_t rm_val = get_register(rm); 1721 int32_t rm_val = get_register(rm);
1722 int32_t rs_val = get_register(rs); 1722 int32_t rs_val = get_register(rs);
1723 int32_t rd_val = 0; 1723 int32_t rd_val = 0;
1724 switch (instr->Bits(21, 3)) { 1724 switch (instr->Bits(21, 3)) {
1725 case 1: 1725 case 1:
1726 // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd. 1726 // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
1727 // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd"); 1727 // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
1728 case 3: { 1728 case 3: {
1729 // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd. 1729 // Registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
1730 // Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd"); 1730 // Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
1731 if (TargetCPUFeatures::arm_version() != ARMv7) {
1732 UnimplementedInstruction(instr);
1733 break;
1734 }
1731 rd_val = get_register(rd); 1735 rd_val = get_register(rd);
1732 // fall through 1736 // fall through
1733 } 1737 }
1734 case 0: { 1738 case 0: {
1735 // Registers rd, rn, rm are encoded as rn, rm, rs. 1739 // Registers rd, rn, rm are encoded as rn, rm, rs.
1736 // Format(instr, "mul'cond's 'rn, 'rm, 'rs"); 1740 // Format(instr, "mul'cond's 'rn, 'rm, 'rs");
1737 int32_t alu_out = rm_val * rs_val; 1741 int32_t alu_out = rm_val * rs_val;
1738 if (instr->Bits(21, 3) == 3) { // mls 1742 if (instr->Bits(21, 3) == 3) { // mls
1739 alu_out = -alu_out; 1743 alu_out = -alu_out;
1740 } 1744 }
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after
1772 } 1776 }
1773 ASSERT((result == 0) == (hi_res == 0)); // Z bit 1777 ASSERT((result == 0) == (hi_res == 0)); // Z bit
1774 ASSERT(((result & (1LL << 63)) != 0) == (hi_res < 0)); // N bit 1778 ASSERT(((result & (1LL << 63)) != 0) == (hi_res < 0)); // N bit
1775 SetNZFlags(hi_res); 1779 SetNZFlags(hi_res);
1776 } 1780 }
1777 break; 1781 break;
1778 } 1782 }
1779 case 2: 1783 case 2:
1780 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 1784 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
1781 // Format(instr, "umaal'cond's 'rd, 'rn, 'rm, 'rs"); 1785 // Format(instr, "umaal'cond's 'rd, 'rn, 'rm, 'rs");
1786 if (TargetCPUFeatures::arm_version() == ARMv5TE) {
1787 // umaal is only in ARMv6 and above.
1788 UnimplementedInstruction(instr);
1789 }
1782 case 5: 1790 case 5:
1783 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 1791 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
1784 // Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs"); 1792 // Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
1785 case 7: { 1793 case 7: {
1786 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 1794 // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
1787 // Format(instr, "smlal'cond's 'rd, 'rn, 'rm, 'rs"); 1795 // Format(instr, "smlal'cond's 'rd, 'rn, 'rm, 'rs");
1788 int32_t rd_lo_val = get_register(rd); 1796 int32_t rd_lo_val = get_register(rd);
1789 int32_t rd_hi_val = get_register(rn); 1797 int32_t rd_hi_val = get_register(rn);
1790 uint32_t accum_lo = static_cast<uint32_t>(rd_lo_val); 1798 uint32_t accum_lo = static_cast<uint32_t>(rd_lo_val);
1791 int32_t accum_hi = static_cast<int32_t>(rd_hi_val); 1799 int32_t accum_hi = static_cast<int32_t>(rd_hi_val);
(...skipping 2073 matching lines...) Expand 10 before | Expand all | Expand 10 after
3865 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); 3873 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
3866 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); 3874 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
3867 buf->Longjmp(); 3875 buf->Longjmp();
3868 } 3876 }
3869 3877
3870 } // namespace dart 3878 } // namespace dart
3871 3879
3872 #endif // !defined(HOST_ARCH_ARM) 3880 #endif // !defined(HOST_ARCH_ARM)
3873 3881
3874 #endif // defined TARGET_ARCH_ARM 3882 #endif // defined TARGET_ARCH_ARM
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