Fixes ARM multiplication instruction version checking.

runtime/vm/disassembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/disassembler.h"
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "platform/assert.h"
@@ skipping 678 matching lines @@
           }
           break;
         }
         default: {
           Unknown(instr);  // Not used.
           break;
         }
       }
     } else if (instr->IsMultiplyOrSyncPrimitive()) {
       if (instr->Bit(24) == 0) {
-        if ((TargetCPUFeatures::arm_version() != ARMv7) &&
-            (instr->Bits(21, 3) != 0)) {
-          // mla ... smlal only supported on armv7.
-          Unknown(instr);
-          return;
-        }
         // multiply instructions
         switch (instr->Bits(21, 3)) {
           case 0: {
             // Assembler registers rd, rn, rm are encoded as rn, rm, rs.
             Format(instr, "mul'cond's 'rn, 'rm, 'rs");
             break;
           }
           case 1: {
             // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
             Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
             break;
           }
           case 2: {
+            if (TargetCPUFeatures::arm_version() == ARMv5TE) {
+              Unknown(instr);
+              return;
+            }
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             Format(instr, "umaal'cond's 'rd, 'rn, 'rm, 'rs");
             break;
           }
           case 3: {
+            if (TargetCPUFeatures::arm_version() != ARMv7) {
+              Unknown(instr);
+              return;
+            }
             // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
             Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
             break;
           }
           case 4: {
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             Format(instr, "umull'cond's 'rd, 'rn, 'rm, 'rs");
             break;
           }
           case 5: {
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
             break;
           }
           case 6: {
             // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
             Format(instr, "smull'cond's 'rd, 'rn, 'rm, 'rs");
             break;
           }
-          case 7: {
-            // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
-            Format(instr, "smlal'cond's 'rd, 'rn, 'rm, 'rs");
-            break;
-          }
           default: {
             Unknown(instr);  // Not used.
             break;
           }
         }
       } else {
+        if (TargetCPUFeatures::arm_version() == ARMv5TE) {
+          // strex and ldrex are only supported after ARMv6.
+          Unknown(instr);
+          return;
+        }
         // synchronization primitives
         switch (instr->Bits(20, 4)) {
           case 8: {
             Format(instr, "strex'cond 'rd, 'rm, ['rn]");
             break;
           }
           case 9: {
             Format(instr, "ldrex'cond 'rd, ['rn]");
             break;
           }
@@ skipping 700 matching lines @@
       Unknown(instr);
     }
   }
 }
 
 
 void ARMDecoder::InstructionDecode(uword pc) {
   Instr* instr = Instr::At(pc);
 
   if (instr->ConditionField() == kSpecialCondition) {
-    if (instr->InstructionBits() == static_cast<int32_t>(0xf57ff01f)) {
+    if ((instr->InstructionBits() == static_cast<int32_t>(0xf57ff01f)) &&
+        (TargetCPUFeatures::arm_version() != ARMv5TE)) {
       Format(instr, "clrex");
     } else {
       if (instr->IsSIMDDataProcessing()) {
         DecodeSIMDDataProcessing(instr);
       } else {
         Unknown(instr);
       }
     }
   } else {
     switch (instr->TypeField()) {
@@ skipping 44 matching lines @@
   int32_t instruction_bits = Instr::At(pc)->InstructionBits();
   OS::SNPrint(hex_buffer, hex_size, "%08x", instruction_bits);
   if (out_instr_size) {
     *out_instr_size = Instr::kInstrSize;
   }
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM