Make return statements single steppable

runtime/vm/debugger_mips.cc

Index: runtime/vm/debugger_mips.cc
===================================================================
--- runtime/vm/debugger_mips.cc	(revision 31428)
+++ runtime/vm/debugger_mips.cc	(working copy)
@@ -31,58 +31,6 @@
              *reinterpret_cast<uword*>(closure_addr));
 }
 
-
-void CodeBreakpoint::PatchFunctionReturn() {
-  Instr* instr1 = Instr::At(pc_ - 5 * Instr::kInstrSize);
-  Instr* instr2 = Instr::At(pc_ - 4 * Instr::kInstrSize);
-  Instr* instr3 = Instr::At(pc_ - 3 * Instr::kInstrSize);
-  Instr* instr4 = Instr::At(pc_ - 2 * Instr::kInstrSize);
-  Instr* instr5 = Instr::At(pc_ - 1 * Instr::kInstrSize);
-
-#if defined(DEBUG)
-  instr1->AssertIsImmInstr(LW, SP, RA, 2 * kWordSize);
-  instr2->AssertIsImmInstr(LW, SP, FP, 1 * kWordSize);
-  instr3->AssertIsImmInstr(LW, SP, PP, 0 * kWordSize);
-  instr4->AssertIsSpecialInstr(JR, RA, ZR, ZR);
-  instr5->AssertIsImmInstr(ADDIU, SP, SP, 4 * kWordSize);
-#endif  // defined(DEBUG)
-
-  // Smash code with call instruction and target address.
-  uword stub_addr = StubCode::BreakpointReturnEntryPoint();
-  uint16_t target_lo = stub_addr & 0xffff;
-  uint16_t target_hi = stub_addr >> 16;
-
-  // Unlike other architectures, the sequence we are patching in is shorter
-  // than the sequence we are replacing. We pad at the top with nops so that
-  // the end of the new sequence is lined up with the code descriptor.
-  instr1->SetInstructionBits(Instr::kNopInstruction);
-  instr2->SetImmInstrBits(LUI, ZR, TMP, target_hi);
-  instr3->SetImmInstrBits(ORI, TMP, TMP, target_lo);
-  instr4->SetSpecialInstrBits(JALR, TMP, ZR, RA);
-  instr5->SetInstructionBits(Instr::kNopInstruction);
-
-  CPU::FlushICache(pc_ - 5 * Instr::kInstrSize, 5 * Instr::kInstrSize);
-}
-
-
-void CodeBreakpoint::RestoreFunctionReturn() {
-  Instr* instr1 = Instr::At(pc_ - 5 * Instr::kInstrSize);
-  Instr* instr2 = Instr::At(pc_ - 4 * Instr::kInstrSize);
-  Instr* instr3 = Instr::At(pc_ - 3 * Instr::kInstrSize);
-  Instr* instr4 = Instr::At(pc_ - 2 * Instr::kInstrSize);
-  Instr* instr5 = Instr::At(pc_ - 1 * Instr::kInstrSize);
-
-  ASSERT(instr2->OpcodeField() == LUI && instr2->RtField() == TMP);
-
-  instr1->SetImmInstrBits(LW, SP, RA, 2 * kWordSize);
-  instr2->SetImmInstrBits(LW, SP, FP, 1 * kWordSize);
-  instr3->SetImmInstrBits(LW, SP, PP, 0 * kWordSize);
-  instr4->SetSpecialInstrBits(JR, RA, ZR, ZR);
-  instr5->SetImmInstrBits(ADDIU, SP, SP, 4 * kWordSize);
-
-  CPU::FlushICache(pc_ - 5 * Instr::kInstrSize, 5 * Instr::kInstrSize);
-}
-
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS