| Index: src/mips64/assembler-mips64.cc
|
| diff --git a/src/mips64/assembler-mips64.cc b/src/mips64/assembler-mips64.cc
|
| index 2653f4ac33999c1abb59ad60165c16af9fbdc72c..51e85c9bfe6c09a283f11765193b1cd2427af061 100644
|
| --- a/src/mips64/assembler-mips64.cc
|
| +++ b/src/mips64/assembler-mips64.cc
|
| @@ -637,7 +637,7 @@ int Assembler::target_at(int pos, bool is_internal) {
|
| }
|
| }
|
| // Check we have a branch or jump instruction.
|
| - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
|
| + DCHECK(IsBranch(instr) || IsLui(instr));
|
| // Do NOT change this to <<2. We rely on arithmetic shifts here, assuming
|
| // the compiler uses arithmetic shifts for signed integers.
|
| if (IsBranch(instr)) {
|
| @@ -673,17 +673,8 @@ int Assembler::target_at(int pos, bool is_internal) {
|
| return pos - delta;
|
| }
|
| } else {
|
| - int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
|
| - if (imm28 == kEndOfJumpChain) {
|
| - // EndOfChain sentinel is returned directly, not relative to pc or pos.
|
| - return kEndOfChain;
|
| - } else {
|
| - uint64_t instr_address = reinterpret_cast<int64_t>(buffer_ + pos);
|
| - instr_address &= kImm28Mask;
|
| - int delta = static_cast<int>(instr_address - imm28);
|
| - DCHECK(pos > delta);
|
| - return pos - delta;
|
| - }
|
| + UNREACHABLE();
|
| + return 0;
|
| }
|
| }
|
|
|
| @@ -703,7 +694,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) {
|
| return;
|
| }
|
|
|
| - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
|
| + DCHECK(IsBranch(instr) || IsLui(instr));
|
| if (IsBranch(instr)) {
|
| int32_t imm18 = target_pos - (pos + kBranchPCOffset);
|
| DCHECK((imm18 & 3) == 0);
|
| @@ -734,15 +725,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) {
|
| instr_at_put(pos + 3 * Assembler::kInstrSize,
|
| instr_ori2 | (imm & kImm16Mask));
|
| } else {
|
| - uint64_t imm28 = reinterpret_cast<uint64_t>(buffer_) + target_pos;
|
| - imm28 &= kImm28Mask;
|
| - DCHECK((imm28 & 3) == 0);
|
| -
|
| - instr &= ~kImm26Mask;
|
| - uint32_t imm26 = imm28 >> 2;
|
| - DCHECK(is_uint26(imm26));
|
| -
|
| - instr_at_put(pos, instr | (imm26 & kImm26Mask));
|
| + UNREACHABLE();
|
| }
|
| }
|
|
|
| @@ -2596,7 +2579,6 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc,
|
| }
|
| Instr instr = instr_at(pc);
|
| DCHECK(RelocInfo::IsInternalReferenceEncoded(rmode));
|
| - DCHECK(IsJ(instr) || IsLui(instr));
|
| if (IsLui(instr)) {
|
| Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
|
| Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
|
| @@ -2628,21 +2610,8 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc,
|
| instr_ori2 | (imm & kImm16Mask));
|
| return 4; // Number of instructions patched.
|
| } else {
|
| - uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
|
| - if (static_cast<int32_t>(imm28) == kEndOfJumpChain) {
|
| - return 0; // Number of instructions patched.
|
| - }
|
| -
|
| - imm28 += pc_delta;
|
| - imm28 &= kImm28Mask;
|
| - DCHECK((imm28 & 3) == 0);
|
| -
|
| - instr &= ~kImm26Mask;
|
| - uint32_t imm26 = imm28 >> 2;
|
| - DCHECK(is_uint26(imm26));
|
| -
|
| - instr_at_put(pc, instr | (imm26 & kImm26Mask));
|
| - return 1; // Number of instructions patched.
|
| + UNREACHABLE();
|
| + return 0; // Number of instructions patched.
|
| }
|
| }
|
|
|
| @@ -2916,40 +2885,6 @@ void Assembler::set_target_address_at(Address pc,
|
| }
|
|
|
|
|
| -void Assembler::JumpLabelToJumpRegister(Address pc) {
|
| - // Address pc points to lui/ori instructions.
|
| - // Jump to label may follow at pc + 2 * kInstrSize.
|
| - uint32_t* p = reinterpret_cast<uint32_t*>(pc);
|
| -#ifdef DEBUG
|
| - Instr instr1 = instr_at(pc);
|
| -#endif
|
| - Instr instr2 = instr_at(pc + 1 * kInstrSize);
|
| - Instr instr3 = instr_at(pc + 6 * kInstrSize);
|
| - bool patched = false;
|
| -
|
| - if (IsJal(instr3)) {
|
| - DCHECK(GetOpcodeField(instr1) == LUI);
|
| - DCHECK(GetOpcodeField(instr2) == ORI);
|
| -
|
| - uint32_t rs_field = GetRt(instr2) << kRsShift;
|
| - uint32_t rd_field = ra.code() << kRdShift; // Return-address (ra) reg.
|
| - *(p+6) = SPECIAL | rs_field | rd_field | JALR;
|
| - patched = true;
|
| - } else if (IsJ(instr3)) {
|
| - DCHECK(GetOpcodeField(instr1) == LUI);
|
| - DCHECK(GetOpcodeField(instr2) == ORI);
|
| -
|
| - uint32_t rs_field = GetRt(instr2) << kRsShift;
|
| - *(p+6) = SPECIAL | rs_field | JR;
|
| - patched = true;
|
| - }
|
| -
|
| - if (patched) {
|
| - CpuFeatures::FlushICache(pc+6, sizeof(int32_t));
|
| - }
|
| -}
|
| -
|
| -
|
| Handle<ConstantPoolArray> Assembler::NewConstantPool(Isolate* isolate) {
|
| // No out-of-line constant pool support.
|
| DCHECK(!FLAG_enable_ool_constant_pool);
|
|
|