MIPS: Major fixes and clean-up in asm. for instruction encoding.

test/cctest/test-disasm-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 74 matching lines @@
 
 
 // Verify that all invocations of the COMPARE macro passed successfully.
 // Exit with a failure if at least one of the tests failed.
 #define VERIFY_RUN() \
 if (failure) { \
     V8_Fatal(__FILE__, __LINE__, "MIPS Disassembler tests failed.\n"); \
   }
 
 
-TEST(Type1) {
-  if (kArchVariant == kMips64r6) {
-    SET_UP();
-    COMPARE(seleqz(a0, a1, a2), "00853035       seleqz    a0, a1, a2");
-    COMPARE(selnez(a0, a1, a2), "00853037       selnez    a0, a1, a2");
-
-
-    COMPARE(seleqz(D, f3, f4, f5), "462428d4       seleqz.D    f4, f5, f3");
-    COMPARE(selnez(D, f3, f4, f5), "462428d7       selnez.D    f4, f5, f3");
-
-    /*COMPARE(min(D, f3, f4, f5),
-          "462428dc       min.D    f4, f5, f3");
-    COMPARE(max(D, f3, f4, f5),
-          "462428de       max.D    f4, f5, f3");*/
-    VERIFY_RUN();
-  }
-}
-
-
 TEST(Type0) {
   SET_UP();
 
   COMPARE(addu(a0, a1, a2),
           "00a62021       addu    a0, a1, a2");
   COMPARE(daddu(a0, a1, a2),
           "00a6202d       daddu   a0, a1, a2");
   COMPARE(addu(a6, a7, t0),
           "016c5021       addu    a6, a7, t0");
   COMPARE(daddu(a6, a7, t0),
@@ skipping 559 matching lines @@
           "7c62f804       ins     v0, v1, 0, 32");
   COMPARE(ext_(a0, a1, 31, 1),
           "7ca407c0       ext     a0, a1, 31, 1");
   COMPARE(ext_(s6, s7, 30, 2),
           "7ef60f80       ext     s6, s7, 30, 2");
   COMPARE(ext_(v0, v1, 0, 32),
           "7c62f800       ext     v0, v1, 0, 32");
 
   VERIFY_RUN();
 }
+
+
+TEST(Type1) {
+  if (kArchVariant == kMips64r6) {
+    SET_UP();
+    COMPARE(seleqz(a0, a1, a2), "00a62035       seleqz    a0, a1, a2");
+    COMPARE(selnez(a0, a1, a2), "00a62037       selnez    a0, a1, a2");
+
+
+    COMPARE(seleqz(D, f3, f4, f5), "462520d4       seleqz.d    f3, f4, f5");
+    COMPARE(selnez(D, f3, f4, f5), "462520d7       selnez.d    f3, f4, f5");
+
+    COMPARE(min(D, f3, f4, f5), "462520dc       min.d    f3, f4, f5");
+    COMPARE(max(D, f3, f4, f5), "462520de       max.d    f3, f4, f5");
+    VERIFY_RUN();
+  }
+}