[turbofan][arm64] Match add with shifted operand for mult by a power of 2 plus 1.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 834 matching lines @@
 
     // Select Mneg(x, y) for Mul(x, Sub(0, y)).
     if (mright.left().Is(0)) {
       Emit(kArm64Mneg32, g.DefineAsRegister(node),
            g.UseRegister(m.left().node()),
            g.UseRegister(mright.right().node()));
       return;
     }
   }
 
+  // x * (2^k + 1) -> x + (x << k)
+  if (m.right().HasValue() && m.right().Value() > 0) {
+    int32_t value = m.right().Value();
+    if (base::bits::IsPowerOfTwo32(value - 1)) {
+      Emit(kArm64Add32 | AddressingModeField::encode(kMode_Operand2_R_LSL_I),
+           g.DefineAsRegister(node), g.UseRegister(m.left().node()),
+           g.UseRegister(m.left().node()),
+           g.TempImmediate(WhichPowerOf2(value - 1)));
+      return;
+    }
+  }
+
   VisitRRR(this, kArm64Mul32, node);
 }
 
 
 void InstructionSelector::VisitInt64Mul(Node* node) {
   Arm64OperandGenerator g(this);
   Int64BinopMatcher m(node);
 
   if (m.left().IsInt64Sub() && CanCover(node, m.left().node())) {
     Int64BinopMatcher mleft(m.left().node());
@@ skipping 11 matching lines @@
     Int64BinopMatcher mright(m.right().node());
 
     // Select Mneg(x, y) for Mul(x, Sub(0, y)).
     if (mright.left().Is(0)) {
       Emit(kArm64Mneg, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
            g.UseRegister(mright.right().node()));
       return;
     }
   }
 
+  // x * (2^k + 1) -> x + (x << k)
+  if (m.right().HasValue() && m.right().Value() > 0) {
+    int64_t value = m.right().Value();
+    if (base::bits::IsPowerOfTwo64(value - 1)) {
+      Emit(kArm64Add | AddressingModeField::encode(kMode_Operand2_R_LSL_I),
+           g.DefineAsRegister(node), g.UseRegister(m.left().node()),
+           g.UseRegister(m.left().node()),
+           g.TempImmediate(WhichPowerOf2_64(value - 1)));
+      return;
+    }
+  }
+
   VisitRRR(this, kArm64Mul, node);
 }
 
 
 void InstructionSelector::VisitInt32MulHigh(Node* node) {
   // TODO(arm64): Can we do better here?
   Arm64OperandGenerator g(this);
   InstructionOperand const smull_operand = g.TempRegister();
   Emit(kArm64Smull, smull_operand, g.UseRegister(node->InputAt(0)),
        g.UseRegister(node->InputAt(1)));
@@ skipping 825 matching lines @@
          MachineOperatorBuilder::kFloat64RoundTruncate |
          MachineOperatorBuilder::kFloat64RoundTiesAway |
          MachineOperatorBuilder::kWord32ShiftIsSafe |
          MachineOperatorBuilder::kInt32DivIsSafe |
          MachineOperatorBuilder::kUint32DivIsSafe;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8