Index: src/mips/macro-assembler-mips.cc |
diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc |
index 2b6a25011b143c5566eaab61c99bbbf317216fee..24c698727603ac8382f81db9d4e87a8b2783ccbd 100644 |
--- a/src/mips/macro-assembler-mips.cc |
+++ b/src/mips/macro-assembler-mips.cc |
@@ -1430,9 +1430,9 @@ void MacroAssembler::Mfhc1(Register rt, FPURegister fs) { |
} |
-void MacroAssembler::BranchFSize(SecondaryField sizeField, Label* target, |
- Label* nan, Condition cc, FPURegister cmp1, |
- FPURegister cmp2, BranchDelaySlot bd) { |
+void MacroAssembler::BranchFCommon(SecondaryField sizeField, Label* target, |
+ Label* nan, Condition cc, FPURegister cmp1, |
+ FPURegister cmp2, BranchDelaySlot bd) { |
BlockTrampolinePoolScope block_trampoline_pool(this); |
if (cc == al) { |
Branch(bd, target); |
@@ -1551,20 +1551,6 @@ void MacroAssembler::BranchFSize(SecondaryField sizeField, Label* target, |
} |
-void MacroAssembler::BranchF(Label* target, Label* nan, Condition cc, |
- FPURegister cmp1, FPURegister cmp2, |
- BranchDelaySlot bd) { |
- BranchFSize(D, target, nan, cc, cmp1, cmp2, bd); |
-} |
- |
- |
-void MacroAssembler::BranchFS(Label* target, Label* nan, Condition cc, |
- FPURegister cmp1, FPURegister cmp2, |
- BranchDelaySlot bd) { |
- BranchFSize(S, target, nan, cc, cmp1, cmp2, bd); |
-} |
- |
- |
void MacroAssembler::FmoveLow(FPURegister dst, Register src_low) { |
if (IsFp64Mode()) { |
DCHECK(!src_low.is(at)); |